VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7937
Features
• Typical Rise Times of 100ps
• High-Speed Operation
(Up to 2.5Gb/s NRZ Data)
• 3V Output Voltage Compliance
• Single-Ended or Differential Input Operation
• Single Power Supply: +5V or -5.2V
• Direct Access to Modulation and Bias FETs
• On-Die MUX for Clocked or Unclocked
Applications
• On-Chip 50
Ω
Input Clock and Data Termination
Single Supply 2.5Gb/s Voltage Driver
Applications
• SONET/SDH @ 622Mb/s, 1.244Gb/s, 2.488Gb/s
• Full-Speed Fibre Channel (1.062Gb/s)
General Description
The VSC7937 is a single -5.2V supply, 2.5Gb/s voltage driver with direct access to the output modulation
and bias FETs. The output stage can drive 60mA into 50
Ω
with adequate output voltage compliance. Output
bias and modulation currents are set by external components allowing precision monitoring and setting of the
output voltage levels.
VSC7937 Block Diagram
NOUT OUT
I
NOUT
DIN
50
Ω
**
DINTERM*
50
Ω
**
NDIN
D Q
M
U
X
IBIAS1
IMOD
IBIAS2
VIP
CLK
50
Ω
**
CLKTERM*
NCLK
MIB2
SEL
SEL
MIP
MIB1
50
Ω
**
VIB2
VIB1
*Terminated to Off-chip Capacitor
**On Die Components
G52200-0, Rev 3.0
03/05/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 1
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
Single Supply 2.5Gb/s Voltage Driver
VSC7937
Electrical Characteristics
Table 1: High-Speed Inputs and ECL Outputs
V
SS
= -5.2V, R
L
= 50Ω at I
OUT
pin
Symbol
V
IN
V
CM
V
OH
V
OL
V
IN
I
NOUT
Parameter
Single-Ended Input Voltage Swing
Differential Input Common-Mode Range
ECL Output HIGH Voltage
ECL Output LOW Voltage
On-Chip Terminations
Maximum Peak Current
(1)
Min
300
-2.3
-1200
Typ
—
—
—
—
—
—
Max
1500
-1.3
Units
V
mV
mV
Ω
mA
Conditions
V
SS
= -5.2V
50Ω to -2.0V
50Ω to -2.0V
VIP = VSS + 1.4V
VIB1 = -5.2V
VIB2 = -5.2V
DIN = LOW
VIP = -4.1V
VIB1 = -5.2V
VIB2 = -5.2V
DIN = HIGH
20% to 80%
VIP = -4.1V
VIB1 = -5.2V
VIB2 = -5.2V
DIN = LOW
mVp-p V
CM
= -2.0V
—
-1600
65
—
—
35
60
I
NOUT
t
R,
t
F
V
OUT
t
SU
t
H
Maximum Peak Current
Rise and Fall Times
Output Voltage
Set-up Time - Data to CLK
Hold Time
—
—
—
20
—
—
—
—
50
50
4
100
-3.0
—
90
mA
ps
V
ps
ps
NOTE: (1) 100mA when R
L
= 30Ω at (N) OUT pin.
Table 2: DC Characteristics
Symbol
V
SS
I
BIAS1,
I
BIAS2
V
DCC
V
IH
V
IL
VIB1, VIB2
VIP
Parameter
Power Supply Voltage
Maximum Bias Current
Duty-Cycle Control Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
BIAS Control Voltage
Modulation Control Voltage
Min
-5.5
30
V
SS
-1.15
—
V
SS
V
SS
Typ
-5.2
—
—
-0.9
-1.7
—
—
Max
-4.75
—
V
SS
+
3V
-0.8
-1.45
V
SS
+1.8
V
SS
+1.4
Units
V
mA
V
V
V
V
V
Conditions
VIB1, 2 = VSS + 1.8V
VIP = -5.2V
V
REF
= 1.3V
V
REF
= 1.3V
Page 2
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52200-0, Rev 3.0
03/05/01
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7937
Table 3: Power Dissipation
Symbol
I
SS
P
D
Single Supply 2.5Gb/s Voltage Driver
Parameter
Power Supply Current (V
SS
)
Total Power Dissipation
Min
—
—
Typ
—
-
—
Max
120
700
Units
mA
mW
Conditions
V
SS
= -5.5V, I
MOD
=
I
BIAS
= 0mA
V
SS
= -5.5V, I
MOD
=
I
BIAS
= 0 mA
Table 4: Package Thermal Specifications
Symbol
θ
JCC
θ
JCP
Parameter
Thermal Resistance from Junction to Case
Thermal Resistance from Junction to Case
Min
—
—
Typ
25
15
Max
—
—
Units
°C/W
°C/W
Conditions
Ceramic Package
Plastic Package
Table 5: MUX Select Logic Table
Symbol
VSS
GND
NC
Clocked Data In
Non-clocked Data In
Non-clocked Data In
Rating
Absolute Maximum Ratings
(1)
Power Supply Voltage (V
SS
) ............................................................................................................. V
CC
to -6.0V
Operating Junction Temperature Range (T
J
)............................................................................... -55°C to +125°C
Storage Temperature Range (T
S
)................................................................................................. -65°C to +150°C
NOTE: (1) CAUTION: Stresses listed under “Absolute Maximum Ratings” may be applied to devices one at a time without caus-
ing permanent damage. Functionality at or above the values listed is not implied. Exposure to these values for extended
periods may affect device reliability.
Recommended Operating Conditions
Positive Voltage Rail (GND) ..............................................................................................................................0V
Negative Voltage Rail (V
SS
) .......................................................................................................................... -5.2V
Operational Case Temperature Range (T
C
)
(1)
............................................................................... -40°C to +85°C
NOTE: (1) Lower limit of specification is ambient temperature and upper limit is case temperature
G52200-0, Rev 3.0
03/05/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 3
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
Single Supply 2.5Gb/s Voltage Driver
Figure 1: On-Chip Data and Clock Input Configuration
GND
DIN
(CLK)
DINTERM
(CLKTERM)
NDIN
(NCLK)
VSC7937
GND
DATA BUFFER
(CLOCK BUFFER)
X
*
50
*
*
4.0K
6.4K
X
*
50
X
*On-chip
Components
VSS
VSS
Figure 2: Single-Ended Operation
7937
DATA
SOURCE
0.1µf
GND
0.1µf
DIN
DINTERM
NDIN
0.1µf
0.1µf
GND
CLOCK
SOURCE
0.1µf
GND
CLK
CLKTERM
NCLK
0.1µf
GND
Figure 3: Single-Ended AC-Coupled
GND
0.1µf
SOURCE
DINTERM
(CLKTERM)
DIN
(CLK)
X
50
4.0K
-2.0V
50
6.4K
X
X
0.1µf
GND
NDIN
(NCLK)
0.1µf
VSS
GND
Page 4
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52200-0, Rev 3.0
03/05/01
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7937
Single Supply 2.5Gb/s Voltage Driver
Figure 4: Differential AC-Coupled
GND
0.1µf
SOURCE
0.1µf
DIN
(CLK)
X
DINTERM
(CLKTERM)
50
4.0K
-2.0V
X
0.1µf
GND
NDIN
(NCLK)
50
6.4K
X
VSS
Figure 5: Differential DC-Coupled/Differential ECL
GND
DIN
(CLK)
X
SOURCE
DINTERM
(CLKTERM)
50
4.0K
-2.0V
X
NDIN
(NCLK)
50
6.4K
X
-2.0V
VSS
G52200-0, Rev 3.0
03/05/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 5
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