PCMCIA SRAM Memory Card
SRV20 Series
SRAM Memory Card
General Description
2MB through 16MB
Features
•
High Performance SRAM memory Card
• Universal 3.3 to 5 Volt Supply allows for wider
compatibility between systems.
• Fast Access times: 150ns @ 3.3V – 5V
• x8/x16 PCMCIA standard interface
• Low Power CMOS technology provides very low
power and reliable data retention characteristics
- standby current < 100µA typical
• Rechargeable Lithium battery with recharge circuitry
- eliminates the need for replaceable batteries
- standby current during recharge typically < 2mA
- battery backup time
• 18 months - type I card
• 40 months - type II card
typical based on 4MB
• Unlimited write cycles, no endurance issues
• Optional Features:
• 2KB EEPROM attribute memory containing CIS
• Optional Hardware Write Protect switch
• PC Card Standard Type I or Type II Form Factor
The WEDC SRAM Series (SRV20) memory cards
offer a high performance nonvolatile storage solution
for code and data storage, disk caching, and write
intensive mobile and embedded applications.
Packaged in PCMCIA type I or type II housing (type
II for cards with extended battery backup time), the
WEDC SRAM SRV20 series is based on high
density and super low power SRAM memory
devices, providing densities from 2MBytes to
16MBytes.
The SRV20 series of SRAM memory cards has a
universal wide power supply (3V to 5V) and operates
at speeds as high as 150ns. The cards are based on
advanced CMOS technology providing very low
power and reliable data retention characteristics.
WEDC’s SRAM cards contain a rechargeable
lithium battery and recharge circuitry, eliminating the
need for replaceable batteries found in many SRAM
cards.
WEDC’s standard cards are shipped with WEDC’s
SRAM Logo. Cards are also available with blank
housings (no Logo). The blank housings are available
in both a recessed (for label) and flat housing. Please
contact WEDC sales representative for further
information on Custom artwork.
Block Diagram
16MB SRAM Card Shown
[A1..A21]
Address
buffer
SRAM
2M x 8
[A22..A23]
/CSHi
+ + + + +
CE1#
CE2#
WE#
OE#
REG#
A0
decoder
and
logic
control
/CSLi
/CS-A
/RD
/RD
/WR
/WR
CTRL
SRAM
2M x 8
SRAM
2M x 8
SRAM
2M x 8
SRAM
2M x 8
SRAM
2M x 8
SRAM
2M x 8
SRAM
2M x 8
/CSHi
[A1..A11]
S1
WP
Write Prot
Switch
VS1
VS2
GND
GND
NC
Vcc
/CS-A
/RD
/WR
ATTRIBUTE
MEMORY
CTRL
I/O BUFFER
[DO..D7]
[DO..D7]
[D8..D15]
+
BVD1
BVD2
Vcc
[D8..D15]
Notes: 1. pull down resistor (min 100k)
Power Management
and
Battery Control
to internal
power
supply
+
2. pull up resistor (min 10k)
Lithium Battery
November 2001 Rev. 1 - ECO #xxxx
1
PC Card Products
PCMCIA SRAM Memory Card
SRV20 Series
Pinout
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Signal name
GND
DQ3
DQ4
DQ5
DQ6
DQ7
CE1#
A10
OE#
A11
A9
A8
A13
A14
WE#
RDY/BSY#
Vcc
Vpp1
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
WP
GND
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
O
Function
Ground
Data bit 3
Data bit 4
Data bit 5
Data bit 6
Data bit 7
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
Ready/Busy
Supply Voltage
Prog. Voltage
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
Data bit 1
Data bit 2
Write Potect
Ground
Active
Pin
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Signal name
GND
CD1#
DQ11
DQ12
DQ13
DQ14
DQ15
CE2#
VS1
N.C.
N.C.
A17
A18
A19
A20
A21
Vcc
Vpp2
A22
A23
A24
A25
VS2
N.C.
Wait#
N.C.
REG#
BVD2
BVD1
DQ8
DQ9
DQ10
CD2#
GND
I/O
O
I/O
I/O
I/O
I/O
I
I
O
Function
Ground
Card Detect 1
Data bit 11
Data bit 12
Data bit 13
Data bit 14
Data bit 15
Card Enable 2
Voltage Sense 1
Active
LOW
LOW
LOW
LOW
GND (5)
LOW
N.C.
N.C.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
O
O
O
I
O
O
I/O
I/O
O
O
Address bit 17
Address bit 18
Address bit 19
Address bit 20
2MB(2)
Address bit 21
4MB(2)
Supply Voltage
Prog. Voltage
N.C.
Address bit 22
8MB(2)
Address bit 23 16MB(2,4)
Address bit 24
Address bit 25
Voltage Sense 2
N.C.
Extended Bus Cycle
Attrib Mem Select
Bat. Volt. Detect 2
Bat. Volt. Detect 1
Data bit 8
Data bit 9
Data bit 10
Card Detect 2
Ground
Low
Low
(3)
HIGH
LOW
Notes:
1. CD1# and CD2# are grounded internal to PC Card.
2. Shows density for which specified address bit is MSB. Higher order address bits are no
connects (ie 1MB A19 is MSB, A20 - A21 are NC).
3. BVD1 is an open drain output with a 10K ohm internal pull-up resistor.
4. The A23 Address line for 16MB capacities is also used for 12MB cards.
5. VS1 is grounded and VS2 is open to indicate a 3.3V/5V card, with a 5V key, has been inserted.
November 2001 Rev. 1 - ECO #xxxx
2
PC Card Products
PCMCIA SRAM Memory Card
SRV20 Series
Mechanical
Type I
Interconnect area
1.6mm
±
0.05
(0.063”)
10.0mm MIN
(0.400”)
3.0mm MIN
1.0mm
±
0.05
(0.039”)
Substrate area
54.0mm
±
0.10
(2.126”)
1.0mm
±
0.05
(0.039”)
NOTE 1
10.0mm MIN
(0.400”)
85.6mm
±
0.20
(3.370”)
3.3mm
±
T1 (0.130”)
T1=0.10mm interconnect area
T1=0.20mm substrate area
Type II
1.6mm
±
0.05
0.063”
85.6mm
±
0.20
3.370”
1.0mm
±0.05
0.039’
3.0mm
MIN.
Substrate area
54.0mm
±
0.10
2.126”
1.0mm
±0.05
0.039’
NOTE 1
10.0mm MIN
0.400”
Interconnect area
NOTE 1:
this dimension (1mm) allows insertion
to 5V and 3V sockets
November 2001 Rev. 1 - ECO #xxxx
3
5.0mm
±
T1
0.197”
PC Card Products
PCMCIA SRAM Memory Card
SRV20 Series
Card Signal Description
Symbol
A 0 - A 25
Type
IN PU T
Name and Function
A DDRESS INPUTS:
A 0 through A25 enable direct addressing of up
to 64M B of mem ory on the card. Signal A 0 is not used in w ord access
mode. A 25 is the most significant bit. (address pins used are based on
card density ,see pinout for highest used address pin)
DA TA INPUT/OUTPUT:
DQ 0 TH ROU GH DQ 15 constitute the
bi-directional databus. DQ 0 - DQ 7 constitute the low er (even) by te and
DQ 8 - DQ 15 the upper (odd) by te. DQ 15 is the M SB.
C A RD ENA BLE 1 A ND 2:
C E1# enables even by te accesses, C E2#
enables odd by te accesses. M ultiplexing A0, C E1# and C E2#allow s 8-
bit hosts to access all data on DQ 0 - DQ 7.
O U TPUT ENA BLE:
A ctive low signal enabling read data from the
mem ory card.
W RITE ENA BLE:
Active low signal gating w rite data to the memory
card.
REA DY/BUSY O UTPUT:
N ot used for SR A M cards
C A RD DETEC T 1 and 2:
Provide card insertion detection. T hese
signals are connected to ground internally on the mem ory card. The
host sock et interface circuitry shall supply 10K-ohm or larger pull-up
resistors on these signal pins.
W RITE PRO TEC T:
Follow s hardw are W rite Protect Sw itch. W hen
Sw itch is placed in on position, signal is pulled high (10K ohm). W hen
sw itch is off signal is pulled low .
PRO G RA M/ERA SE PO W ER SU PPLY:
N ot used for SR A M
cards.
C A RD PO W ER SUPPLY:
3.3V / 5.0V for all internal circuitry .
G RO UND:
for all internal circuitry .
A TTRIBUTE MEMORY SELEC T :
only used w ith cards built w ith
optional attribute mem ory .
RESET:
N ot used for SR A M cards
W A IT:
This signal is pulled high internally for compatibility . N o w ait
states are generated.
BA TTERY VO LTA G E DETEC T:
Provides status of Battery
voltage.
BVD2 = BVD1 = Voh (battery voltage is guaranteed to retain data)
BVD2 = Vol, BVD1 = Voh (data is valid, battery recharge required)
BVD2 = BVD1 = Vol (data m ay no longer be valid, battery requires
extended recharge)
VO LTA G E SENSE:
N otifies the host sock et of the card' s VC C
requirements. VS1 is grounded and VS2 is open to indicate a 3.3V/5V
16 bit card, w ith a 5V k ey , has been inserted.
RESERV ED FO R FU TURE USE
NO INTERNA L C O NNEC TIO N TO C A RD:
pin may be driven
or left floating
DQ 0 - DQ 15
C E1#, C E2#
O E#
W E#
RDY/BSY #
C D1#, C D2#
IN PU T/O U T
PU T
IN PU T
IN PU T
IN PU T
O U TPU T
O U TPU T
WP
VPP1, VPP2
VC C
GN D
REG#
RST
W A IT#
BVD1, BVD2
O U TPU T
N .C .
IN PU T
IN PU T
O U TPU T
O U TPU T
VS1, VS2
RFU
N .C .
O U TPU T
SRAM
FUNCTIONAL TRUTH TABLE
READ function
Function Mode
/CE2 /CE1
Standby Mode
H
H
Byte Access (8 bits)
H
L
H
L
Word Access (16 bits)
L
L
Odd-Byte Only Access
L
H
WRITE function
Standby Mode
H
H
Byte Access (8 bits)
H
L
H
L
A0
X
L
H
X
X
X
L
H
/OE
X
L
L
L
L
X
H
H
/WE
X
H
H
H
H
X
L
L
Common Memory
/REG D15-D8
D7-D0
X
High-Z
High-Z
H
High-Z Even-Byte
H
High-Z Odd-Byte
H Odd-Byte Even-Byte
H Odd-Byte High-Z
X
H
H
X
X
X
X
Even-Byte
Odd-Byte
Attribute Memory
/REG D15-D8
D7-D0
X
High-Z
High-Z
L
High-Z Even-Byte
L
High-Z Not Valid
L Not Valid Even-Byte
L Not Valid
High-Z
X
L
L
X
X
X
X
Even-Byte
X
November 2001 Rev. 1 - ECO #xxxx
4
PC Card Products
PCMCIA SRAM Memory Card
SRV20 Series
Absolute Maximum Ratings
(2)
Operating Temperature TA (ambient)
Commercial
Industrial
Storage Temperature
Commercial
Industrial
Voltage on any pin relative to VSS
VCC supply Voltage relative to VSS
0°C to +60 °C
-40°C to +85 °C
0°C to +60 °C
-40°C to +85 °C
-0.5V to +5.5V (1)
-0.5V to +7.0V
Notes:
(1) During transitions, inputs may undershoot to
-2.0V or overshoot to VCC +2.0V for periods less
than 20ns.
(2) Stress greater than those listed under
“Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress
rating only and functional operation at these or
any other conditions greater than those indicated
in the operational sections of this specification is
not implied. Exposure to absolute maximum rating
conditions for extended periods may affect
reliability.
DC Characteristics
(1)
CMOS Test Conditions: VIL = VSS ± 0.2V, VIH = 5V ± 0.2V
Sym
ICC
Parameter
VCC Active Current
Density
2MB
to
16MB
All
All
All
All
All
All
All
Notes
1
Min
Typ
(3)
Max
25
Units
mA
Test Conditions
VCC = 5.25V
tcycle = 150ns
ICCS
ILI
ILO
VIL
VIH
VOL
VOH
VCC Standby Current
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
2, 4
!
5, 6
6
6
6
6
6
< 0.1
<1
10
±20
±20
mA
µA
µA
V
V
V
V
VCC = 5.25V
Control Signals = VCC
VCC = VCCMAX
Vin =VCC or VSS
VCC = VCCMAX
Vout =VCC or VSS
0
3.85
0.8
VCC
+0.5
0.4
VCC
IOL = 3.2mA
IOH = -2.0mA
VCC-0.4
Notes:
1. All currents are for x16 mode and are RMS values unless otherwise specified.
2. Control Signals: CE
1
#, CE
2
#, OE#, WE#, REG#.
3. Typical: VCC = 5V, T = +25C.
4. ICCS includes battery recharge current. Value depends on battery discharge level. ICCS min is specified for fully
charged battery. ICCS typical value is specified for battery discharge to 2.7V. ICCS max is specified for a fully
discharged battery (0V). Battery will recharge to 1.5V in 20 sec.
5. Values are the same for byte and word wide modes for all card densities.
6. Exceptions: Leakage currents on CE1#, CE2#, OE#, REG# and WE# will be < 500 µA when VIN = GND due to
internal pull-up resistors.
Battery Characteristics
Parameter
Battery Life
Card
capacity
Density
All
2MB
4MB
8MB
12MB
16MB
Notes
(1)
(2)
SRV21-24
Type I
Type II
min 10
min 10
18
40
18
40
12
30
10
25
9
20
Units
years
months
(typical)
Conditions
Normal operation, T=25C
Battery backup time is a
calculated value and is not
guaranteed. This should not be
used to schedule battery
recharging. (Temp 25C)
Notes:
1. Battery Life refers to functional lifetime of battery.
2. Battery backup time is density and temperature dependent.
November 2001 Rev. 1 - ECO #xxxx
5
PC Card Products
NXP MCU
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