Data Sheet No. PD60207 Rev.A
IR2302
(S) & (PbF)
HALF-BRIDGE DRIVER
Features
Packages
•
Floating channel designed for bootstrap operation
•
•
•
•
•
•
•
•
•
•
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 5 to 20V
Undervoltage lockout for both channels
3.3V, 5V and 15V input logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
High side output in phase with IN input
Logic and power ground +/- 5V offset.
Internal 540ns dead-time
Lower di/dt gate driver for better noise
immunity
Shut down input turns off both channels
8-Lead SOIC also available LEAD-FREE (PbF).
8-Lead SOIC
IR2302(S)
(Also available LEAD-FREE (PbF))
8-Lead PDIP
IR2302
2106/2301//2108//2109/2302/2304 Feature Comparison
Part
2106/2301
21064
2108
21084
2109/2302
21094
Input
logic
HIN/LIN
HIN/LIN
Cross-
conduction
prevention
logic
no
yes
Dead-Time
Ground Pins
COM
VSS/COM
COM
VSS/COM
COM
VSS/COM
none
Internal 540ns
Programmable 0.54~5
µs
Description
IN/SD
yes
The IR2302(S) are high voltage, high speed
Programmable 0.54~5
µs
power MOSFET and IGBT drivers with depen-
yes
HIN/LIN
Internal 100ns
2304
COM
dent high and low side referenced output
channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction.
The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers
feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can
be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to
600 volts.
Internal 540ns
Typical Connection
up to 600V
V
CC
V
CC
IN
SD
V
B
HO
V
S
LO
IR2302
TO
LOAD
IN
SD
COM
(Refer to Lead Assignments for
correct configuration). This/
These diagram(s) show elec-
trical connections only. Please refer to our Application Notes
and DesignTips for proper circuit board layout.
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1
IR2302(
S
) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dV
S
/dt
P
D
Rth
JA
T
J
T
S
T
L
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage (IN & SD)
Allowable offset supply voltage transient
Package power dissipation @ T
A
≤
+25°C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(8 Lead PDIP)
(8 Lead SOIC)
(8 Lead PDIP)
(8 Lead SOIC)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
COM - 0.3
—
—
—
—
—
—
-50
—
Max.
625
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
50
1.0
0.625
125
200
150
150
300
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
Symbol
VB
V
S
V
HO
V
CC
V
LO
V
IN
T
A
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage (IN & SD)
Ambient temperature
Min.
V
S
+ 5
Note 1
V
S
5
0
COM
-40
Max.
V
S
+ 20
600
V
B
20
V
CC
V
CC
150
Units
V
°
C
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
2
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IR2302(
S
) & (PbF)
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, C
L
= 1000 pF, and T
A
= 25°C unless otherwise specified.
Symbol
ton
toff
tsd
MT
tr
tf
DT
MDT
Definition
Turn-on propagation delay
Turn-off propagation delay
Shut-down propagation delay
Delay matching, HS & LS turn-on/off
Turn-on rise time
Turn-off fall time
Deadtime: LO turn-off to HO turn-on(DT
LO-HO) &
HO turn-off to LO turn-on (DT
HO-LO)
Deadtime matching = DT
LO - HO
- DT
HO-LO
Min.
550
—
—
—
—
—
400
—
Typ.
750
200
200
0
130
50
540
0
Max. Units Test Conditions
950
280
280
50
220
80
680
60
nsec
V
S
= 0V
V
S
= 0V
V
S
= 0V
V
S
= 0V or 600V
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V and T
A
= 25°C unless otherwise specified. The V
IL
, V
IH
and I
IN
parameters are referenced to
COM and are applicable to the respective input leads: IN and SD. The V
O
, I
O
and Ron parameters are referenced to COM
and are applicable to the respective output leads: HO and LO.
Symbol
V
IH
V
IL
V
SD,TH+
V
SD,TH-
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
O+
I
O-
Definition
Logic “1” input voltage for HO & logic “0” for LO
Logic “0” input voltage for HO & logic “1” for LO
SD input positive going threshold
SD input negative going threshold
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current
Logic “0” input bias current
V
CC
and V
BS
supply undervoltage
positive going threshold
V
CC
and V
BS
supply undervoltage
negative going threshold
Hysteresis
Output high short circuit pulsed vurrent
Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
2.9
—
2.9
—
—
—
—
20
0.4
—
—
3.3
3
0.1
120
250
—
—
—
—
0.8
0.3
—
60
1.0
5
—
4.1
3.8
0.3
200
350
—
0.8
—
0.8
1.4
0.6
50
100
1.6
20
2
5
4.7
—
—
—
V
O
= 0V, PW
≤
10
µs
V
O
= 15V,PW
≤
10
µs
µA
mA
µA
V
V
CC
= 10V to 20V
V
CC
= 10V to 20V
V
CC
= 10V to 20V
V
CC
= 10V to 20V
I
O
= 20 mA
I
O
= 20 mA
V
B
= V
S
= 600V
V
IN
= 0V or 5V
V
IN
= 0V or 5V
IN = 5V, SD = 0V
IN = 0V, SD = 5V
V
mA
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3
IR2302(
S
) & (PbF)
Functional Block Diagrams
VB
UV
DETECT
R
HV
LEVEL
SHIFTER
PULSE
GENERATOR
PULSE
FILTER
R
S
Q
HO
IN
VSS/COM
LEVEL
SHIFT
VS
DEADTIME
UV
DETECT
VCC
+5V
LO
SD
VSS/COM
LEVEL
SHIFT
DELAY
COM
4
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IR2302(
S
) & (PbF)
Lead Definitions
Symbol Description
IN
SD
V
B
HO
V
S
V
CC
LO
COM
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO
Logic input for shutdown
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
Lead Assignments
1
2
3
4
VCC
IN
SD
COM
VB
HO
VS
LO
8
7
6
5
1
2
3
4
VCC
IN
SD
COM
VB
HO
VS
LO
8
7
6
5
8 Lead PDIP
8 Lead SOIC
(Also available LEAD-FREE (PbF)
IR2302
IR2302S
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5
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