Philips Semiconductors
Product specification
Dual N-channel dual gate MOS-FET
FEATURES
•
Two low noise gain controlled amplifiers in a single
package
•
Superior cross-modulation performance during AGC
•
High forward transfer admittance
•
High forward transfer admittance to input capacitance
ratio.
APPLICATIONS
•
Gain controlled low noise amplifiers for VHF and UHF
applications with 3 to 9 V supply voltage, such as digital
and analog television tuners and professional
communications equipment.
handbook, halfpage
BF1203
PINNING - SOT363
PIN
1
2
3
4
5
6
gate 1 (a)
gate 2
drain (a)
drain (b)
source
gate 1 (b)
DESCRIPTION
g1 (b)
4
s
d (b)
6
5
DESCRIPTION
The BF1203 is a combination of two different dual gate
MOS-FET amplifiers with shared source and gate 2 leads.
The source and substrate are interconnected.
Internal bias circuits enable DC stabilization and a very
good cross-modulation performance during AGC.
Integrated diodes between the gates and source protect
against excessive input voltage surges. The transistor is
encapsulated in a SOT363 micro-miniature plastic
package.
AMP
a
AMP
b
1
2
3
g1 (a)
g2
d (a)
MBL254
Top view
Marking code: L2-
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
−
−
amp. a: I
D
= 15 mA
amp. b: I
D
= 12 mA
C
ig1-s
C
rss
NF
X
mod
input capacitance at gate 1
amp. a: I
D
= 15 mA; f = 1 MHz
amp. b: I
D
= 12 mA; f = 1 MHz
reverse transfer capacitance f = 1 MHz
noise figure
cross-modulation
amp. a: f = 400 MHz; I
D
= 15 mA
amp. b: f = 800 MHz; I
D
= 12 mA
amp. a: input level for k = 1% at 40 dB AGC
amp. b: input level for k = 1% at 40 dB AGC
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
2001 Apr 25
2
23
25
−
−
−
−
−
105
100
TYP.
−
−
28
30
2.6
1.7
15
1
1.1
−
105
MAX. UNIT
Per MOS-FET unless otherwise specified
V
DS
I
D
y
fs
drain-source voltage
drain current (DC)
forward transfer admittance
10
30
35
40
3.1
2.2
−
1.8
1.8
−
−
V
mA
mS
mS
pF
pF
fF
dB
dB
dBµV
dBµV
Philips Semiconductors
Product specification
Dual N-channel dual gate MOS-FET
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
CONDITIONS
−
−
−
−
T
s
≤
102
°C;
note 1
−
−65
−
MIN.
BF1203
MAX.
UNIT
Per MOS-FET unless otherwise specified
V
DS
I
D
I
G1
I
G2
P
tot
T
stg
T
j
Note
1. T
s
is the temperature at the soldering point of the source lead.
THERMAL CHARACTERISTICS
SYMBOL
R
th j-s
PARAMETER
thermal resistance from junction to soldering point
VALUE
240
UNIT
K/W
drain-source voltage
drain current (DC)
gate 1 current
gate 2 current
total power dissipation
storage temperature
operating junction temperature
10
30
±10
±10
200
+150
150
V
mA
mA
mA
mW
°C
°C
handbook, halfpage
250
MGS359
Ptot
(mW)
200
150
100
50
0
0
50
100
150
Ts (°C)
200
Fig.2 Power derating curve.
2001 Apr 25
3
Philips Semiconductors
Product specification
Dual N-channel dual gate MOS-FET
STATIC CHARACTERISTICS
T
j
= 25
°C
unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
V
G1-S
= V
G2-S
= 0; I
D
= 10
µA
V
GS
= V
DS
= 0; I
G1-S
= 10 mA
V
GS
= V
DS
= 0; I
G2-S
= 10 mA
V
G2-S
= V
DS
= 0; I
S-G1
= 10 mA
V
G1-S
= V
DS
= 0; I
S-G2
= 10 mA
V
DS
= 5 V; V
G2-S
= 4 V; I
D
= 100
µA
V
DS
= 5 V; V
G1-S
= 4 V; I
D
= 100
µA
amp. a:
V
G2-S
= 4 V; V
DS
= 5 V; R
G
= 62 kΩ; note 1
MIN.
BF1203
MAX.
−
10
10
1.5
1.5
1
1.2
19
16
50
20
UNIT
Per MOS-FET unless otherwise specified
V
(BR)DSS
V
(BR)G1-SS
V
(BR)G2-SS
V
(F)S-G1
V
(F)S-G2
V
G1-S(th)
V
G2-S(th)
I
DSX
drain-source breakdown voltage
gate-source breakdown voltage
gate-source breakdown voltage
forward source-gate voltage
forward source-gate voltage
gate-source threshold voltage
gate-source threshold voltage
drain-source current
10
6
6
0.5
0.5
0.3
0.3
11
V
V
V
V
V
V
V
mA
mA
nA
nA
amp. b:
8
V
G2-S
= 4 V; V
DS
= 5 V; R
G
= 120 kΩ; note 1
I
G1-S
I
G2-S
Note
1. R
G1
connects gate 1 to V
GG
= 5 V.
gate cut-off current
gate cut-off current
V
G1-S
= 5 V; V
G2-S
= V
DS
= 0
V
G2-S
= 5 V; V
G1-S
= V
DS
= 0
−
−
2001 Apr 25
4
Philips Semiconductors
Product specification
Dual N-channel dual gate MOS-FET
DYNAMIC CHARACTERISTICS AMPLIFIER a
Common source; T
amb
= 25
°C;
V
G2-S
= 4 V; V
DS
= 5 V; I
D
= 15 mA; unless otherwise specified.
SYMBOL
y
fs
C
ig1-ss
C
ig2-ss
C
oss
C
rss
F
PARAMETER
forward transfer admittance
input capacitance at gate 1
input capacitance at gate 2
output capacitance
noise figure
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 10.7 MHz; G
S
= 20 mS; B
S
= 0
f = 400 MHz; Y
S
= Y
S opt
f = 800 MHz; Y
S
= Y
S opt
G
tr
power gain
f = 200 MHz; G
S
= 2 mS; B
S
= B
S opt
;
G
L
= 0.5 mS; B
L
= B
L opt
; note 1
f = 400 MHz; G
S
= 2 mS; B
S
= B
S opt
;
G
L
= 1 mS; B
L
= B
L opt
; note 1
f = 800 MHz; G
S
= 3.3 mS; B
S
= B
S opt
;
G
L
= 1 mS; B
L
= B
L opt
; note 1
X
mod
cross-modulation
input level for k = 1%; f
w
= 50 MHz;
f
unw
= 60 MHz; note 2
at 0 dB AGC
at 10 dB AGC
at 40 dB AGC
Notes
1. Calculated from measured s-parameters.
2. Measured in Fig.35 test circuit.
90
−
105
−
95
−
−
−
−
CONDITIONS
pulsed; T
j
= 25
°C
MIN.
23
−
−
−
−
−
−
−
−
−
−
TYP.
28
2.6
3
0.9
15
5
1
1.9
32.5
27
21
BF1203
MAX.
35
3.1
−
−
30
7
1.8
2.5
−
−
−
UNIT
mS
pF
pF
pF
fF
dB
dB
dB
dB
dB
dB
reverse transfer capacitance f = 1 MHz
dBµV
dBµV
dBµV
2001 Apr 25
5
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