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MMBT3904/E8

产品描述Transistor
产品类别分立半导体    晶体管   
文件大小59KB,共3页
制造商Vishay(威世)
官网地址http://www.vishay.com
标准
下载文档 详细参数 全文预览

MMBT3904/E8概述

Transistor

MMBT3904/E8规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Vishay(威世)
包装说明,
Reach Compliance Codecompliant
最大集电极电流 (IC)0.2 A
配置Single
最小直流电流增益 (hFE)100
JESD-609代码e3
最高工作温度150 °C
极性/信道类型NPN
最大功率耗散 (Abs)0.3 W
表面贴装YES
端子面层Matte Tin (Sn)
标称过渡频率 (fT)300 MHz

MMBT3904/E8文档预览

MMBT3904
New Product
Vishay Semiconductors
formerly General Semiconductor
Small Signal Transistor (NPN)
TO-236AB (SOT-23)
.122 (3.1)
.110 (2.8)
.016 (0.4)
3
.056 (1.43
)
.052 (1.33
)
Top View
Mounting Pad Layout
0.031 (0.8)
0.035 (0.9)
Pin Configuration
1 = Base 2 = Emitter
3 = Collector
1
2
max. .004 (0.1)
0.079 (2.0)
.007 (0.175)
.005 (0.125)
.037(0.95) .037(0.95)
.045 (1.15)
.037 (0.95)
0.037 (0.95)
0.037 (0.95)
.016 (0.4)
.016 (0.4)
.102 (2.6)
.094 (2.4)
Dimensions in inches and (millimeters)
Features
• NPN Silicon Epitaxial Planar Transistor for
switching and amplifier applications.
• As complementary type, the PNP transistor
MMBT3906 is recommended.
• This transistor is also available in the TO-92 case
with the type designation 2N3904.
Mechanical Data
Case:
SOT-23 Plastic Package
Weight:
approx. 0.008g
Marking Code:
1AM
Packaging Codes/Options:
E8/10K per 13” reel (8mm tape), 30K/box
E9/3K per 7” reel (8mm tape), 30K/box
Maximum Ratings & Thermal Characteristics
Parameter
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Collector Current
Power Dissipation at T
A
= 25°C
Thermal Resistance Junction to Substrate Backside
Thermal Resistance Junction to Ambient Air
Junction Temperature
Storage Temperature Range
Note:
(1) Device on fiberglass substrate, see layout.
(2) Device on alumina substrate.
Ratings at 25°C ambient temperature unless otherwise specified.
Symbol
V
CBO
V
CEO
V
EBO
I
C
P
tot
R
ΘSB
R
ΘJA
T
j
T
S
Value
60
40
6.0
200
225
(1)
300
(2)
320
(1)
450
(1)
150
–65 to +150
Unit
V
V
V
mA
mW
°C/W
°C/W
°C
°C
Document Number 88224
10-May-02
www.vishay.com
1
MMBT3904
Vishay Semiconductors
formerly General Semiconductor
Electrical Characteristics
(T
Parameter
J
= 25°C unless otherwise noted)
Symbol
Test Condition
V
CE =
1 V, I
C
= 0.1 mA
V
CE =
1 V, I
C
= 1 mA
V
CE =
1 V, I
C
= 10 mA
V
CE =
1 V, I
C
= 50 mA
V
CE =
1 V, I
C
= 100 mA
I
C
= 10
µA,
I
E
= 0
I
C
= 1 mA, I
B
= 0
I
E
= 10
µA,
I
C
= 0
I
C
= 10 mA, I
B
= 1 mA
I
C
= 50 mA, I
B
= 5 mA
I
C
= 10 mA, I
B
= 1 mA
I
C
= 50 mA, I
B
= 5 mA
V
EB
= 3 V, V
CE
= 30 V
V
EB
= 3 V, V
CE
= 30 V
V
CE
= 20 V, I
C
= 10 mA
f = 100 MHz
V
CB
= 5 V, f = 100 kHz
V
EB
= 0.5 V, f = 100 kHz
Min
40
70
100
60
30
60
40
6.0
300
Typ
Max
300
0.2
0.3
0.85
0.95
50
50
4
8
Unit
DC Current Gain
h
FE
Collector-Base Breakdown Voltage
Collector-Emitter Breakdown Voltage
Emitter-Base Breakdown Voltage
Collector Saturation Voltage
Base Saturation Voltage
Collector-Emitter Cut-off Current
Emitter-Base Cut-off Current
Gain-Bandwidth Product
Collector-Base Capacitance
Emitter-Base Capacitance
V
(BR)CBO
V
(BR)CEO
V
(BR)EBO
V
CEsat
V
BEsat
I
CEV
I
EBV
f
T
C
CBO
C
EBO
V
V
V
V
V
nA
nA
MHz
pF
pF
0.30 (7.5)
0.12 (3)
.04 (1)
.08 (2)
.04 (1)
.08 (2)
0.59 (15)
0.47 (12)
0.03 (0.8)
0.2 (5)
0.06 (1.5)
0.20 (5.1)
Dimensions in inches and
(millimeters)
www.vishay.com
2
Document Number 88224
10-May-02
MMBT3904
Vishay Semiconductors
formerly General Semiconductor
Electrical Characteristics
(T
Parameter
Noise Figure
Input Impedance
Small Signal Current Gain
Voltage Feedback Ratio
Output Admittance
Delay Time (see Fig. 1)
Rise Time (see Fig. 1)
Storage Time (see Fig. 2)
Fall Time (see Fig. 2)
J
= 25°C unless otherwise noted)
Symbol
NF
h
ie
h
fe
h
re
h
oe
t
d
t
r
t
s
t
f
Test Condition
V
CE
= 5 V, I
C
= 100
µA,
R
G
= 1 kΩ, f = 10...15000 Hz
V
CE
= 10 V, I
C
= 1 mA,
f = 1 kHz
V
CE
= 10 V, I
C
= 1 mA,
f = 1 kHz
V
CE
= 10 V, I
C
= 1 mA,
f = 1 kHz
V
CE
= 1 V, I
C
= 1 mA,
f = 1 kHz
I
B1
= 1 mA, I
C
= 10 mA
I
B1
= 1 mA, I
C
= 10 mA
I
B1
= I
B2
= 1 mA, I
C
I
B1
= I
B2
= 1 mA, I
C
Min
1
100
0.5 • 10
-4
1
Typ
Max
5
10
400
8 • 10
-4
40
35
35
200
50
Unit
dB
kΩ
µS
ns
ns
ns
ns
= 10 mA
= 10 mA
Fig. 1:
Test circuit for delay and rise time
* total shunt capacitance of test jig and connectors
Fig. 2:
Test circuit for storage and fall time
* total shunt capacitance of test jig and connectors
Document Number 88224
10-May-02
www.vishay.com
3

 
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