Single/Dual/Triple E3/DS3/STS-1
Line Interface Unit
Data Sheet
CX28331/CX28332/CX28333 (–1x)
28333-DSH-001-A
Feb 2003
Revision History
Revision
A
Level
—
Date
2/2003
Description
Initial Release [Document number 28333-DSH-001-A]
Updated LBO to 450 feet
Incorporated Errata #500371A
Removed CX2833i-3x information (see prior document)
Removed EVM, IBIS, and JAT Appendices
Fixed description of transmit AIS during loopback
operations
Added loopback diagrams
Updated PCB design considerations
Added power sequencing requirements
General corrections
© 2002, 2003
Mindspeed Technologies™, a Conexant business
All Rights Reserved.
Information in this document is provided in connection with Mindspeed Technologies (“Mindspeed”) products. These materials are provided by
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makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future
changes to its specifications and product descriptions.
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which is
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28333-DSH-001-A
Mindspeed Technologies
™
Mindspeed Proprietary and Confidential
CX28331/CX28332/CX28333 (–1x)
Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit
The CX28333 is a three-channel, DS3/E3/STS-1, fully integrated Line Interface Unit
Distinguishing Features
(LIU) device. It is configured via external pins and does not require a microprocessor
• Programmable pulse shaper to meet
interface. Each channel has an independent receive equalizer requiring no user
cross-connect pulse masks (ANSI T1.102-
1993)
configuration. Additionally, each channel has a programmable transmit pulse shaper
• Meets jitter tolerance and jitter generation
that can be set to ensure that the transmit pulse meets the pulse mask requirement
specifications of Bellcore GR499, GR253
for the digital cross-connect. The CX28332 is a dual-channel, and the CX28331 is a
and ETSI TBR24
single-channel LIU with performance identical to the CX28333.
•
The CX28333 gives the user new economies of scale in concentrator applications
where three DS3 or STS-1 channels
are
concentrated into a single STS-3 channel.
a capacitor.
NOTE:
•
•
Each line interface is reduced to 1:1 coupling transformers, terminating resistors, and
•
In this document, "i" is used to represent the number of channels:
i = 1 (CX28331), i = 2 (CX28332), and i = 3 (CX28333).
•
•
•
Functional Block Diagram
Alarms for coding violation and loss of
signal
Full diagnostic loopback capability
Uses a minimum of external components
Compliant with ITU-G.703 and ETSI
TBR24
Independent power down mode per
channel
Easily interfaced to the DS3/E3 Framer IC
(CX28342/3/4/6/8 and CN8330)
Selectable B3ZS/HDB3 encoding/
decoding
XOE
LBO
E3MODE
PDB
TPOS
TNEG
TCLK
TAIS
PDATA/
NDATA
ENCODER
TCLK
Physical Characteristics
•
•
•
Pulse
Shaper
TLINEP
TLINEM/N
LINE
DRIVER
•
•
•
80-pin ETQFP package
Single 3.3 V power supply
1 W maximum power dissipation
(CX28333)
- 40 °C to +85 °C temperature range
5 V-tolerant pins
TTL digital pins
Applications
DATA
MUX
REFCLK
RLOOP
LLOOP
RPOS
RNEG
RCLK
RLOS
DECODER
PDATA
Clock/
NDATA
Data
DATCLK Recovery
P
N
Receiver
RLINEP
RLINEM/N
REQH
Channel 1
Channel 2
Channel 3
•
•
•
•
•
•
•
Digital Cross-Connect Systems
Routers
ATM Switches
Channelized Line Aggregation Units
Test Equipment
Channel Service Units
Multiplexers
ENDECDIS
ALOS
28333-DSH-001-A
Mindspeed Technologies
™
Mindspeed Proprietary and Confidential
iii
CX28333EVM
TX B3ZS/HDB3 analog out
NRZTX DATA and CLK in
CH1
NRZRX DATA and CLK out
F
R
A
M
E
R
S
I
D
E
CH1
RX B3ZS/HDB3 analog in
TX B3ZS/HDB3 analog out
NRZTX DATA and CLK in
CH2
NRZRX DATA and CLK out
L
I
N
E
S
I
D
E
CX28333
CH2
RX B3ZS/HDB3 analog in
TX B3ZS/HDB3 analog out
NRZTX DATA and CLK in
CH3
NRZRX DATA and CLK out
Loss of Signal
Code Violation
CH3
RX B3ZS/HDB3 analog in
Clock Input
Control
100985_002
Ordering Information
Model Number
CX28331-1x
CX28332-1x
CX28333-1x
Package
80-Pin ETQFP
80-Pin ETQFP
80-Pin ETQFP
Description
Single-channel LIU
Dual-channel LIU
Triple-channel LIU
Operating Temperature
–40 °C to +85 °C
–40 °C to +85 °C
–40 °C to +85 °C
iv
Mindspeed Technologies
™
Mindspeed Proprietary and Confidential
28333-DSH-001-A
Table of Contents
Table of Contents
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
List of Figures
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii
List of Tables
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
1.0
Pin Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.1
Pin Assignments
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
2.0
Functional Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
2.1
2.2
Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
Transmitter
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
2.4
2.5
2.4.1
2.5.1
2.5.2
2.5.3
2.6
AMI B3ZS/HDB3 Encoder
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Pulse Shaper
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Line Driver
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.2.3.1
Transmit Pulse Mask Templates
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
Alarm Indication Signal (AIS) Generator
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
Jitter Generation (Intrinsic)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
Receive Sensitivity
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
AGC/VGA Block
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
Receive Equalizer
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
The PLL Clock Recovery Circuit
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
Loss Of Signal (LOS) Detector
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
B3ZS/HDB3 Decoder With Bipolar Violation Detector
. . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
Data Squelching
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
Jitter Transfer.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
Bias Generator
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
Power-On Reset (POR)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
Loopback Multiplexers (MUXes)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
Receiver
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
Jitter Tolerance
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
Additional CX2833i Functions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14
Mechanical Specifications
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
28333-DSH-001-A
Mindspeed Technologies
™
Mindspeed Proprietary and Confidential
v
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