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7206L50P

产品描述PDIP-28, Tube
产品类别存储    存储   
文件大小242KB,共15页
制造商IDT (Integrated Device Technology)
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7206L50P概述

PDIP-28, Tube

7206L50P规格参数

参数名称属性值
Brand NameIntegrated Device Technology
是否无铅含铅
是否Rohs认证不符合
厂商名称IDT (Integrated Device Technology)
零件包装代码PDIP
包装说明PLASTIC, DIP-28
针数28
制造商包装代码PD28
Reach Compliance Codenot_compliant
ECCN代码EAR99
最长访问时间50 ns
其他特性RETRANSMIT
最大时钟频率 (fCLK)15 MHz
周期时间65 ns
JESD-30 代码R-PDIP-T28
JESD-609代码e0
长度36.576 mm
内存密度147456 bit
内存集成电路类型OTHER FIFO
内存宽度9
湿度敏感等级1
功能数量1
端子数量28
字数16384 words
字数代码16000
工作模式ASYNCHRONOUS
最高工作温度70 °C
最低工作温度
组织16KX9
可输出NO
封装主体材料PLASTIC/EPOXY
封装代码DIP
封装等效代码DIP28,.6
封装形状RECTANGULAR
封装形式IN-LINE
并行/串行PARALLEL
峰值回流温度(摄氏度)245
电源5 V
认证状态Not Qualified
座面最大高度4.699 mm
最大待机电流0.008 A
最大压摆率0.12 mA
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术CMOS
温度等级COMMERCIAL
端子面层Tin/Lead (Sn85Pb15)
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度15.24 mm

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CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9
8,192 x 9, 16,384 x 9
32,768 x 9 and 65,536 x 9
LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018
IDT7203
IDT7204
IDT7205
IDT7206
IDT7207
IDT7208
FEATURES:
First-In/First-Out Dual-Port memory
2,048 x 9 organization (IDT7203)
4,096 x 9 organization (IDT7204)
8,192 x 9 organization (IDT7205)
16,384 x 9 organization (IDT7206)
32,768 x 9 organization (IDT7207)
65,636 x 9 organization (IDT7208)
High-speed: 12ns access time
Low power consumption
— Active: 660mW (max.)
— Power-down: 44mW (max.)
Asynchronous and simultaneous read and write
Fully expandable in both word depth and width
720x family is pin and functionally compatible from 256 x 9 to 64k x 9
Status Flags: Empty, Half-Full, Full
Retransmit capability
High-performance CMOS technology
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing for #5962-88669 (IDT7203), 5962-89567
(IDT7203), and 5962-89568 (IDT7204) are listed on this function
Industrial temperature range (–40°C to +85°C) is available
(plastic packages only)
Green parts available, see ordering information
DESCRIPTION:
The IDT7203/7204/7205/7206/7207/7208 are dual-port memory buffers
with internal pointers that load and empty data on a first-in/first-out basis. The
device uses Full and Empty flags to prevent data overflow and underflow and
expansion logic to allow for unlimited expansion capability in both word size and
depth.
Data is toggled in and out of the device through the use of the Write (W) and
Read (R) pins.
The device's 9-bit width provides a bit for a control or parity at the user’s
option. It also features a Retransmit (RT) capability that allows the read pointer
to be reset to its initial position when
RT
is pulsed LOW. A Half-Full Flag is
available in the single device and width expansion modes.
These FIFOs are fabricated using high-speed CMOS technology. They
are designed for applications requiring asynchronous and simultaneous read/
writes in multiprocessing, rate buffering and other applications.
Military grade product is manufactured in compliance with MIL-STD-883,
Class B.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
(D
0
-D
8
)
W
WRITE
CONTROL
WRITE
POINTER
RAM ARRAY
2,048 x 9
4,096 x 9
8,192 x 9
16,384 x 9
32,768 x 9
65,536 x 9
READ
POINTER
THREE-
STATE
BUFFERS
R
READ
CONTROL
FLAG
LOGIC
DATA OUTPUTS
(Q
0
-Q
8
)
RS
RESET
LOGIC
FL/RT
EF
FF
XI
EXPANSION
LOGIC
XO/HF
2661 drw01
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
COMMERCIAL, MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
©
2017 Integrated Device Technology, Inc. All rights reserved. Product subject to change without notice.
NOVEMBER 2017
DSC-2661/19
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