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PT7A7511-15/7521-25/7531-35
μP Supervisor Circuits
Features
Description
The PT7A751X/752X/753X family micro-
processor (P) supervisory circuits are targeted to
improve reliability and accuracy of power-supply
circuitry in
P’s
systems. These devices reduce the
complexity and number of components required to
monitor power-supply and battery functions.
The main functions are:
1. Asserting reset output during power-up, power-
down and brownout conditions for
P
system.
2. Detecting power failure or low-battery
conditions with a 1.25V threshold detector.
3. Watchdog functions (not for PT7A753x)
Precision supply-voltage monitor
-
4.63V (PT7A7511, 7521, 7531)
-
4.38V (PT7A7512, 7522, 7532)
-
3.08V (PT7A7513, 7523, 7533)
-
2.93V (PT7A7514, 7524, 7534)
-
2.63V (PT7A7515, 7525, 7535)
200ms reset pulse width
Debounced TTL/CMOS-compatible manual-
reset input
Independent watchdog timer 1.6sec time-out (not
available for PT7A7531 - 7535)
Reset output signal:
-
-
-
Active-low only (PT7A7511 - 7515)
Active-high only (PT7A7521 - 7525)
Active-high and active-low (PT7A7531 - 7535)
Voltage monitor for power-fail or low battery
warning
Application
Power-supply circuitry in
P
systems
Guaranteed RESET/RESET valid at V
CC
=1.2V
Pin Configuration
PT7A7511P-7515P
PT7A7511W-7515W
8-Pin PDIP/8-Pin SOIC
MR
V
CC
GND
PFI
1
2
3
4
8
7
6
5
WDO
RESET
WDI
PFO
MR
V
CC
GND
PFI
PT7A7521P-7525P
PT7A7521W-7525W
8-Pin PDIP/8-Pin SOIC
1
2
3
4
8
7
6
5
WDO
RESET
WDI
PFO
MR
V
CC
GND
PFI
PT7A7531P-7535P
PT7A7531W-7535W
8-Pin PDIP/8-Pin SOIC
1
2
3
4
8
7
6
5
RESET
RESET
NC
PFO
Top View
12-07-0002
1
PT0082-7
07/05/12
PT7A7511-15/7521-25/7531-35
μP Supervisor Circuits
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Pin Description
Pin
MR
V
CC
GND
PFI
PFO
Type
I
Power
Ground
I
O
Description
Manual-Reset:
triggers a reset pulse when pulled below 0.8V, active low. It has an internal 250mA pull-
up current and be driven from a TTL or CMOS logic line as well as shorted to ground with a switch.
Supply Voltage.
Ground Reference
for all signals.
Power-Fail Voltage Monitor Input.
When PFI is less than 1.25V, PFO goes low. Connect PFI to GND
or Vcc when not used.
Power-Fail Output:
it gets low and sinks current when PFI is less than 1.25V; otherwise PFO stays high.
Watchdog Input:
If WDI remains high or low for 1.6sec, the internal watchdog timer runs out and WDO
goes low. Floating WDI or connecting WDI to a high-impedance three-state buffer disables the watchdog
feature. The internal watchdog timer clears whenever reset is asserted. WDI is three-stated, or WDI sees a
rising or falling edge.
Reset Output pulses:
low for 200ms when triggered, and stays low whenever Vcc is below the reset
threshold. It remains low for 200ms after Vcc rises above the reset threshold or MR goes from low to high.
A watchdog timeout will not trigger RESET unless WDO is connected to MR.
Watchdog Output:
pulls low when the internal watchdog timer finishes its 1.6sec count and does not go
high again until the watchdog is cleared. WDO also goes low during low-line conditions. Whenever Vcc is
below the reset threshold, WDO stays low; however, unlike RESET, WDO does not have minimum pulse
width. As soon as Vcc rises above the reset threshold, WDO goes high with no delay.
The inverse of RESET,
active high. Whenever RESET is high, RESET is low.
WDI
I
RESET
O
WDO
O
O
RESET
Block Diagram
Block Diagram of PT7A7511-7515/7521-7525
WDI
Watchdog
Transition Detector
Vcc
250uA
Watchdog Timer
WDO
Timebase for Reset
& Watchdog
MR
Reset Generator
Vcc
RESET
(RESET)
V
RST
PFI
1.25V
PFO
12-07-0002
2
PT0082-7
07/05/12
PT7A7511-15/7521-25/7531-35
μP Supervisor Circuits
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Block Diagram of PT7A7531-35
Vcc
250uA
MR
Reset Generator
Vcc
RESET
RESET
V
RST
PFI
PFO
1.25V
Maximum Ratings
Storage Temperature ............................................................-65
o
C to +150
o
C
Ambient Temperature with Power Applied.......................... -40
o
C to +85
o
C
Supply Voltage to Ground Potential (Vcc to GND) ..............-0.3V to +7.0V
DC Input Voltage (All inputs except Vcc and GND)......-0.3V to V
CC
+0.3V
DC Output Current (All outputs) ..........................................................20mA
Power Dissipation .......................................... 500mW (Depend on package)
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
Recommended Operation Conditions
Sym
V
CC
Description
Supply Voltage for 75x1,75x2
Supply Voltage for 75x3,75x4
Supply Voltage for 75x5
MR Input High Voltage
WDI Input High Voltage
MR Input Low Voltage
WDI Input Low Voltage
Operating Temperature
Test Conditions
-
-
V
CC
> 4.0V
V
CC
≤ 4.0V
-
V
CC
> 4.0V
V
CC
≤ 4.0V
-
-
Min
4.5
3.0
2.7
2.0
0.7V
CC
0.7V
CC
-
-
-
-40
Typ
5.0
3.3
3.0
2.4
-
-
-
-
-
-
Max
5.5
5.5
5.5
-
-
-
0.8
0.2V
CC
0.3V
CC
85
Unit
V
V
V
V
V
V
V
V
℃
V
IH1
V
IH2
V
IL1
V
IL2
T
A
12-07-0002
3
PT0082-7
07/05/12
PT7A7511-15/7521-25/7531-35
μP Supervisor Circuits
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DC Electrical Characteristics
(V
CC
= V
RN
+ 5% to 5.5V, T
A
= -40~85º unless otherwise noted.)(Note 1)
C,
Symbol
Description
Test Conditions
75x1/x2 Vcc = 5V,
75x3/x4 Vcc = 3.3V,
75x5 Vcc = 3.0V, Left WDI un-
connected (No output load)
Pin: MR, WDI
Pin: MR, WDI
T
A
= 25º
C
75x1
V
RST
Reset Threshold Voltage
(Note
2)
75x2
75x3
75x4
75x5
V
RTH
＋
Reset Threshold Voltage
(Note
2)
Output High Voltage
V
CC
Varies between V
RN
- 5%
Vcc
4.5V Isource=800µ
A
V
OH
Vcc
2.7V Isource=500µ
A
Vcc
1.8V Isource=150µ
A
Vcc
4.5V Isink=3.2mA
V
OL
Output Low Voltage
Vcc
2.7V Isink=1.2mA
Vcc
1.2V Isink=100µ
A
V
PFI
varies from 1.0V to 1.5V
V
PFI
varies from 0V to 1.0V
PFI connected to Vcc
PFI connected to GND
WDI connected to V
CC
WDI connected to GND
Min
Typ
Max
Unit
I
CC
V
IH
V
IL
Supply Current
Input High Voltage
Input Low Voltage
-
0.7V
CC
-
V
RN
- 1.5%
4.560
4.314
3.034
2.886
2.590
-
Vcc-1.5
0.8×
Vcc
0.8×
Vcc
-
-
-
1.23
1.20
-
-2.00
-
-100
30
-
-
V
RN
4.630
4.380
3.080
2.930
2.630
70
-
-
-
-
-
-
1.25
1.25
-
-
30
-30
200
-
0.3V
CC
V
RN
+ 1.5%
4.699
4.446
3.126
2.974
2.669
-
-
-
-
0.4
0.3
0.3
1.27
1.30
2.00
-
100
-
µA
V
V
V
mV
V
V
V
PFT
I
PFI
PFI Input Threshold
PFI Input Current
Average WDI Input
Current (Note
3)
V
µA
µA
I
WDI
I
MR
-600
-250
-100
µA
MR input Current
MR=0, Vcc = 5V
Note:
1. Parameters of room temperature guaranteed by production test and parameters of full-temperature guaranteed by design.
2. Valid for both RESET and RESET. V
RST
is the Reset threshold voltage when V
CC
from high to low level, V
RN
is nominal
reset threshold voltage.
3. WDI is internally serviced within the watchdog period if WDI is left unconnected.
12-07-0002
4
PT0082-7
07/05/12
PT7A7511-15/7521-25/7531-35
μP Supervisor Circuits
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AC Electrical Characteristics
Symbol
t
RS
t
WD
t
MR
t
MD
t
WP
Description
Reset Pulse Width
Watchdog Timeout Period
MR Pulse Width
MR to RESET Delay
WDI Pulse Width
Test Conditions
MR from low to High, T
A
=25℃
WDI, MR tied to Vcc, Vcc>V
RN
+5% ,
T
A
=25℃
-
Vcc=5V
-
Min
160
1.2
200
-
150
Typ
200
1.6
-
-
-
Max
280
2.25
-
250
-
Unit
ms
s
ns
ns
ns
Watchdog Timing Diagram
t
WP
t
WD
t
WD
t
WD
5V
WDI
WDO
0V
5V
0V
5V
RESET
Externally
Triggered by MR
t
RS
0V
5V
RESET
0V
Watchdog Timing Diagram
V
CC
V
RT
V
RT
t
RS
t
RS
5V
0V
5V
0V
RESET
MR
t
MD
t
MR
WDO
5V
0V
5V
0V
12-07-0002
5
PT0082-7
07/05/12
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