MIC691/693
Micrel
MIC691/693
µ
P Supervisory Circuit
Advance Information
General Description
The MIC691/693 mircoprocessor supervisory multifunction
circuit which monitors battery control functions and power
supplies in microprocessor based systems. The circuit func-
tions include a watchdog timer, microprocessor reset, backup
battery switchover, CMOS RAM write protection, and power
failure warning.
The power supply line is monitored with a comparator and an
internal voltage reference. /RESET will remain logic low with
V
CC
as low as 1.4V and will remain low for 200ms after V
CC
rises above the reset threshold voltage. Battery-backup
mode is activated when V
CC
falls below both the reset
threshold and V
BATT
. V
CC
is connected to V
OUT
through a low
impedance PMOS switch and is capable of currents up to
250mA.
The MIC691 has a 5V reset threshold, while the MIC693 has
a low threshold of 4.4V.
Features
•
•
•
•
•
•
•
•
•
•
•
•
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Power OK/Resettime delay, 200ms
Watchdog timer, 100ms, 1.6s or Adj.
4.65V or 4.40V Precision Voltage Monitor
Available in 8-pin surface mount (SO)
V
OUT
capable of sourcing up to 250mA
Available in16-pin surface mount (SO)
<1µA Standby current
Early power fail warning or low battery detect
Automotive systems
Intelligent systems
Critical microprocessor power monitoring
Battery powered computers
Controllers
Applications
Ordering Information
Part Number
MIC691NC
MIC691MC
MIC693NC
MIC693MC
Junction Temp. Range*
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
Package
16-Lead PDIP
16-Lead SOP
16-Lead PDIP
16-Lead SOP
Typical Application
µP
VCC
+5V (Regulated)
Auxiliary
Power
DC Voltage
(Unregulated)
PFI
VCC
RESET
WDI
RESET
I/O Line
VBATT
PFO
VOUT
NMI
CMOS RAM
VCC
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com
July 2000
1
MIC691/693
MIC691/693
Micrel
Pin Configuration
V
BATT
1
V
OUT
2
V
CC
3
GND 4
BATT ON 5
LOW LINE 6
OSC IN 7
OSC SEL 8
16 RESET
15 RESET
14 WDO
MIC691
MIC693
13 CE IN
12 CE OUT
11 WDI
10 PFO
9 PFI
MIC691NC
MIC691MC
MIC693NC
MIC693MC
16-Lead PDIP Package
16-Lead SOP Package
16-Lead PDIP Package
16-Lead SOP Package
Pin Description
Pin Number
1
Pin Name
VBATT
Pin Function
Backup Battery/auxiliary power input. When V
CC
falls below V
BATT
, auxiliary
power is routed to V
OUT
through a PMOS switch. V
BATT
pin shoul be
conected to GND if backup battery or auxiliary power is not is not used
Output for supply voltage. During normal operation (V
CC
> V
BATT
), V
CC
is
routed to V
OUT
through a PMOS switch with a typical on resistance of less
than 1Ω. The V
OUT
pin can source a continous current of up to 250mA.
When V
CC
drops below V
BATT
, auxiliary power is routed from the V
BATT
pin
to V
OUT
through a PMOS switch with a typical on resistance fo less than
15Ω. Ht e V
OUT
pin can source a continous current of up to 25mA when in
battery mode (V
CC
< V
BATT
)
Primary supply voltage, +5V
IC ground pin, 0V reference
Backup Battery Mode indicater. Logic low during normal operation( V
CC
drops below V
BATT
. BATT ON output can typically sink 60mA. This output
can also be used for high current applications which require the V
OUT
pin to
source more than 250mA by providing base drive to an external PNP
transistor.
Low V
CC
indicator, goes low when V
CC
drops below the reset threshold.
External Oscillator Input. When OSC SEL is driven low, an external clock or
an external capacitor can be connected to OSC IN to reset the timeout
periods (Table 1.). The internal oscillator is enabled when OSC SEL is
driven high or left floating. When using the internal oscillator, the watchdog
timeout period is set to 00ms by connecting the OSC IN pinto GND or to 1.6
seconds if the OSC IN is left floating. In either case, the watchdog timeout
period following a reset is 1.6 seconds
Oscillator Select Input. An internal oscillator sets the the watchdog timeout
period and reset delay when the OSC SEL is driven high or left floating.
When OSC SEL is driven low, an external clock or capacito on the OSC IN
pin can be used to set the watchdog timeout period and reset delay.
Power fail input. Internally connected to the power fail comparator which is
referenced to 1.25V. The power fail output (/PFO) remains hih if PFI is
above 1.25V. PFI should be connected to GND or VOUT if the power fail
comparator is not used
2
VOUT
3
4
5
VCC
GND
BATT ON
6
7
/LOWLINE
OSC IN
8
OSC SEL
9
PFI
MIC691/693
2
July 2000
MIC691/693
Pin Number
10
11
Pin Name
/PFO
WDI
Pin Function
Power fail output. The power fail comparator is independent of all other
functions on this device.
Micrel
Watchdog input. The WDI input monitors microprocessor activity, an internal
watchdog timer resets itself with each transition on the watchdog input. If the
WDI pin is held high or low for longer than the watchdog timeout period,
/RESET and /WDO are forced low. The wachdog function can be disabled
by floating the WDI pin.
Chip Enable Output. /CE OUT follows /CE IN when /RESET and RESETare
not asserted. /CE OUT is forced to VOUT when /RESET and RESET are
asserted
Chip Enable Input. /CE IN is the input for the chip enable gating circuit.
Decoder output or address line from
µP
can be used to generate /CE IN.
Connect to VOUT or GND if chip enable gating circuit is not used
Watchdog Timer Output. Watchdog timer resets itself with each transition on
the watchdog input. If the WDI pin is held high or low for onger than the
watchdog timeout period, /RESET and /WDO are forced low. The watchdog
function can be disabled by floating te WDI pin.
Output for the
µP
reset circuitry. /RESET is asserted if either V
CC
goes
below the reset threshold or the watchdog times out. /RESET remains
asserted for one reset timeout period (Table 1.) after V
CC
exceeds the reset
threshold or afterthewatchdog times out.
Output for the
µP
reset circuitry. RESET is activ high with an open drain and
is the inverse of /RESET.
12
/CE OUT
13
/CE IN
14
/WDO
15
/RESET
16
RESET
July 2000
3
MIC691/693
MIC691/693
Micrel
Absolute Maximum Ratings
(Note 1)
Terminal Voltage
V
CC .........................................................................
–0.3V to +6.0V
All other inputs ........................... –0.3V to (V
OUT
+ 0.3V)
Input Current
V
CC ........................................................................................
250mA
GND, all other inputs .............................................. 25mA
Lead Temperature (soldering, 10 sec.) ..................... 300°C
Storage Temperature ................................. –65°C to 150°C
Operating Ratings
(Note 2)
Operating Temperature Range
MIC691NC ................................................... 0°C to 70°C
MIC691MC ................................................... 0°C to 70°C
MIC691D ...................................................... 0°C to 70°C
MIC693NC ................................................... 0°C to 70°C
MIC693MC ................................................... 0°C to 70°C
MIC693D ...................................................... 0°C to 70°C
Power Dissipation ................................................... 700mW
Electrical Characteristics
V
CC
= 4.75V to 5.5V; V
BATT
= 2.8V; T
A
= Operating Temperature Range,
bold
values indicate –40°C
≤
T
A
≤
+85°C; unless noted
Parameter
Battery Backup Switching
Operating Voltage Range, V
CC
and V
BATT
(Note 4)
Supply Current (excludes I
OUT
)
Supply Current, Battery-Backup
Mode
Battery Standby Current
V
BATT
= 2.8V, T
A
= 25°C
T
A
= Operating Temperature Range
V
CC
≥
V
BATT
+ 0.2V T
A
= 25°C
T
A
= Operating Temperature Range
V
OUT
Output Voltage
V
OUT
, Battery-Backup Mode
V
CC
to V
OUT
On Resistance
V
BATT
to V
OUT
On Resistance
Battery Switchover Threshold
V
CC
= 4.5V, I
OUT
= 25mA
V
CC
= 4.5V, I
OUT
= 250mA
V
CC
< V
BATT
-0.2V, I
OUT
= 250µA
V
CC
= 4.5V
V
BATT
= 4.5V
V
BATT
= 2.8V
Power Up
Power Down
Battery Switchover Hysteresis
BATT ON Output Low Voltage
BATT ON Output Short-Circuit
Current
Reset and Watchdog Timer
Reset Voltage Threshold
MIC690
MIC692
Reset Threshold Hysteresis
Reset Active Timeout Period
/RESET Output Voltage
I
SOURCE
= 1.6mA, V
CC
= 5V
I
SINK
= 3.2mA
I
SINK
= 50µA, V
CC
1.4V (V
CC
falling)
V
BATT
= 0V
Watchdog Timeout Period
WDI Minimum Input Pulse
WDI Threshold Voltage
V
IL
= 0.8V, V
IH
= 75% of V
CC
V
IH
1.0
100
0.75·V
CC
1.6
2.6
Sec
ns
V
140
3.5
0.4
0.3
4.50
4.25
4.65
4.40
25
200
320
4.75
4.50
V
V
mV
ms
V
V
V
I
SINK
= 3.2mA
Sink Current
Source Current
1
60
15
100
V
BAT
+0.03
V
BAT
-0.03
60
0.4
–0.1
–1.0
V
CC
–0.05 V
CC
–0.025
V
CC
–0.3 V
CC
–0.25
V
BAT
–0.1 V
BAT
–0.25
0.7
1.2
15
25
0
35
0.001
5.5
100
1
5
0.02
0.02
V
µA
µA
µA
µA
µA
V
V
V
Ω
Ω
Ω
mV
mV
mV
V
mA
µA
Condition
Min
Typ
Max
Units
MIC691/693
4
July 2000
MIC691/693
Parameter
Condition
V
IL
WDI Input Current
WDI = 0V
WDI = V
OUT
Power Fail Detector
PFI Input Threshold
PFI Leakage Current
/PFO Output Voltage
I
SINK
= 3.2mA
V
CC
= 5V, I
SOURCE
= 1µA
/PFO Output Short Circuit Current
PFI Compataor Response Time
Source Current
V
IN
= 20mV, V
OD
= 15mV
V
IN
= 20mV, V
OD
= 15mV
Note 1.
Note 2.
Note 3.
Note 4.
Exceeding the absolute maximum rating may damage the device.
The device is not guaranteed to function outside its operating rating.5
Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
V
CC
or V
BATT
can go to 0V if the other is
≥
2V
Micrel
Min
Typ
Max
0.7
–50
–10
20
50
Units
V
µA
µ
V
CC
= 5V
1.2
–25
1.25
0.01
1.3
+25
0.4
V
nA
V
V
µA
µs
µs
3.5
1
15
5
30
100
Timing Diagrams
VCC
V1
V2
V1
V2
LOW LINE
CE IN
CE OUT
5
µ
s
80
µ
s
RESET
Timing Diagram for Reset and Chip Enable
July 2000
5
MIC691/693
模拟与混合信号
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