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SN54ALS109AFK

产品描述J-Kbar Flip-Flop, ALS Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, TTL, CQCC20, CERAMIC, CC-20
产品类别逻辑    逻辑   
文件大小203KB,共10页
制造商Rochester Electronics
官网地址https://www.rocelec.com/
下载文档 详细参数 全文预览

SN54ALS109AFK概述

J-Kbar Flip-Flop, ALS Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, TTL, CQCC20, CERAMIC, CC-20

SN54ALS109AFK规格参数

参数名称属性值
厂商名称Rochester Electronics
包装说明QCCN,
Reach Compliance Codeunknown
系列ALS
JESD-30 代码S-CQCC-N20
长度8.89 mm
逻辑集成电路类型J-KBAR FLIP-FLOP
位数2
功能数量2
端子数量20
最高工作温度125 °C
最低工作温度-55 °C
输出极性COMPLEMENTARY
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码QCCN
封装形状SQUARE
封装形式CHIP CARRIER
传播延迟(tpd)20 ns
座面最大高度2.03 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术TTL
温度等级MILITARY
端子形式NO LEAD
端子节距1.27 mm
端子位置QUAD
触发器类型POSITIVE EDGE
宽度8.89 mm
最小 fmax30 MHz

SN54ALS109AFK文档预览

SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
TYPICAL MAXIMUM
CLOCK
FREQUENCY
(MHz)
50
129
TYPICAL POWER
DISSIPATION
PER FLIP-FLOP
(mW)
6
29
SN54ALS109A, SN54AS109A . . . J PACKAGE
SN74ALS109A, SN74AS109A . . . D OR N PACKAGE
(TOP VIEW)
TYPE
′ALS109A
′AS109A
1CLR
1J
1K
1CLK
1PRE
1Q
1Q
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
2CLR
2J
2K
2CLK
2PRE
2Q
2Q
description
These devices contain two independent J-K
positive-edge-triggered flip-flops. A low level at
the preset (PRE) or clear (CLR) inputs sets or
resets the outputs regardless of the levels of the
other inputs. When PRE and CLR are inactive
(high), data at the J and K inputs meeting the
setup-time requirements are transferred to the
outputs on the positive-going edge of the clock
(CLK) pulse. Clock triggering occurs at a voltage
level and is not directly related to the rise time of
the clock pulse. Following the hold-time interval,
data at the J and K inputs can be changed without
affecting the levels at the outputs. These versatile
flip-flops can perform as toggle flip-flops by
grounding K and tying J high. They also can
perform as D-type flip-flops if J and K are tied
together.
SN54ALS109A, SN54AS109A . . . FK PACKAGE
(TOP VIEW)
1J
1CLR
NC
V
CC
1K
1CLK
NC
1PRE
1Q
3
4
5
6
7
8
2 1 20 19
18
17
16
15
2CLR
2J
2K
NC
2CLK
2PRE
14
9 10 11 12 13
NC – No internal connection
The SN54ALS109A and SN54AS109A are characterized for operation over the full military temperature range
of – 55°C to 125°C. The SN74ALS109A and SN74AS109A are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
PRE
L
H
L
H
H
H
H
H
CLR
H
L
L
H
H
H
H
H
CLK
X
X
X
L
J
X
X
X
L
H
L
H
X
K
X
X
X
L
L
H
H
X
H
Q0
OUTPUTS
Q
H
L
H†
L
Toggle
Q0
Q0
L
Q0
Q
L
H
H†
H
† The output levels in this configuration are not specified to
meet the minimum levels for VOH if the lows at PRE and
CLR are near VIL maximum. Furthermore, this
configuration is nonstable; that is, it does not persist when
either PRE or CLR returns to its inactive (high) level.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1995, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
1Q
GND
NC
2Q
2Q
1
SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
logic symbol
1PRE
1J
1CLK
1K
1CLR
2PRE
2J
2CLK
2K
2CLR
1
11
14
12
13
15
9
10
2Q
5
2
4
3
S
1J
C1
1K
R
7
1Q
6
1Q
2Q
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, T
A
: SN54ALS109A . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74ALS109A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS109A
MIN
VCC
VIH
VIL
IOH
IOL
fclock
tw
Supply voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
PRE or CLR low
Pulse duration
CLK high
CLK low
tsu
th
TA
Data
Setup
Set p time before CLK↑
Hold time after CLK↑
Operating free-air temperature
PRE or CLR inactive
Data
0
15
16.5
16.5
15
10
0
– 55
125
4.5
2
0.7
– 0.4
4
30
0
15
14.5
14.5
15
10
0
0
70
ns
ns
°C
ns
NOM
5
MAX
5.5
SN74ALS109A
MIN
4.5
2
0.8
– 0.4
8
34
NOM
5
MAX
5.5
UNIT
V
V
V
mA
mA
MHz
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
II
IIH
IIL
CLK, J, or K
PRE or CLR
CLK, J, or K
PRE or CLR
CLK, J, or K
PRE or CLR
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
VCC = 4 5 V
4.5
VCC = 5 5 V
5.5 V,
VCC = 5 5 V
5.5 V,
VCC = 5 5 V
5.5 V,
II = –18 mA
IOH = – 0.4 mA
IOL = 4 mA
IOL = 8 mA
VI = 7 V
VI = 2 7 V
2.7
VI = 0 4 V
0.4
SN54ALS109A
MIN TYP†
MAX
–1.5
VCC – 2
0.25
0.4
0.1
0.2
20
40
– 0.2
– 0.4
VCC – 2
0.25
0.35
0.4
0.5
0.1
0.2
20
40
– 0.2
– 0.4
SN74ALS109A
MIN TYP†
MAX
–1.5
UNIT
V
V
V
mA
µA
mA
IO‡
VCC = 5.5 V,
VO = 2.25 V
– 20
–112
– 30
–112
mA
ICC
VCC = 5.5 V,
See Note 1
2.4
4
2.4
4
mA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
NOTE 1: ICC is measured with J, K, CLK, and PRE grounded, then with J, K, CLK, and CLR grounded.
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500
Ω,
TA = MIN to MAX§
SN54ALS109A SN74ALS109A
MIN
fmax
tPLH
tPHL
tPLH
30
3
PRE or CLR
CLK
Q or Q
Q or Q
5
5
17
17
21
MAX
MIN
34
3
5
5
5
13
15
16
18
MAX
MHz
ns
ns
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
UNIT
tPHL
5
20
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3
SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, T
A
: SN54AS109A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74AS109A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS109A
MIN
VCC
VIH
VIL
IOH
IOL
fclock*
tw*
Supply voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
PRE or CLR low
Pulse duration
CLK high
CLK low
tsu*
th*
TA
Data
Setup
Set p time before CLK↑
Hold time after CLK↑
Operating free-air temperature
PRE or CLR inactive
Data
0
4
4
5.5
5.5
2
0
– 55
125
4.5
2
0.8
–2
20
90
0
4
4
5.5
5.5
2
0
0
70
ns
ns
°C
ns
NOM
5
MAX
5.5
SN74AS109A
MIN
4.5
2
0.8
–2
20
105
NOM
5
MAX
5.5
UNIT
V
V
V
mA
mA
MHz
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
II
IIH
IIL
CLK, J, or K
PRE or CLR
CLK, J, or K
PRE or CLR
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
VCC = 4.5 V,
VCC = 5.5 V,
VCC = 5 5 V
5.5 V,
VCC = 5 5 V
5.5 V,
II = –18 mA
IOH = – 2 mA
IOL = 20 mA
VI = 7 V
VI = 2 7 V
2.7
VI = 0 4 V
0.4
SN54AS109A
MIN TYP‡
MAX
–1.2
VCC – 2
0.25
0.5
0.1
20
40
– 0.5
–1.8
VCC – 2
0.25
0.5
0.1
20
40
– 0.5
–1.8
SN74AS109A
MIN TYP‡
MAX
–1.2
UNIT
V
V
V
mA
µA
mA
IO§
VCC = 5.5 V,
VO = 2.25 V
– 30
–112
– 30
–112
mA
ICC
VCC = 5.5 V,
See Note 1
11.5
17
11.5
17
mA
‡ All typical values are at VCC = 5 V, TA = 25°C.
§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
NOTE 1: ICC is measured with J, K, CLK, and PRE grounded, then with J, K, CLK, and CLR grounded.
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SN54ALS109A, SN54AS109A, SN74ALS109A, SN74AS109A
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDAS198B – APRIL 1982 – REVISED AUGUST 1995
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500
Ω,
TA = MIN to MAX†
SN54AS109A SN74AS109A
MIN
fmax*
tPLH
tPHL
tPLH
90
2
PRE or CLR
CLK
Q or Q
Q or Q
3.5
2.5
9
11.5
10
MAX
MIN
105
2
3.5
2.5
8
10.5
9
MAX
MHz
ns
ns
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
UNIT
tPHL
3.5
10.5
3.5
9
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
5
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