These devices can address up to 64 Kbytes of external program data memory
The Intel 8XL52 8XL54 8XL58 is a single-chip control oriented microcontroller which is fabricated on Intel’s
reliable CHMOS III-E technology Being a member of the MCS 51 microcontroller family the 8XL52 8XL54
8XL58 uses the same powerful instruction set has the same architecture and is pin-for-pin compatible with
the existing MCS 51 microcontroller products
The 8XL5X is a 3V version of current 8XC5X and will operate from 2 7V to 3 6V at a frequency range of
3 5 MHz to 16 MHz (Express) 20 MHz (Commercial)
For the remainder of this document the 8XL52 8XL54 8XL58 will be referred to as the 8XL5X unless
information applies to a specific device
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT
INTEL CORPORATION 1995
November 1994
Order Number 272468-002
8XL52 54 58
NOTE
Standard
-1
-20
Standard
80L52
87L52
80L54
87L54
80L58
87L58
X
X
X
X
X
X
-1
X
X
X
X
X
X
-20
X
X
X
X
X
X
3 5 MHz to 12 MHz 2 7V to 3 6V
3 5 MHz to 16 MHz 2 7V to 3 6V
3 5 MHz to 20 MHz 2 7V to 3 6V
Only available for commercial standard temperature range not avail-
able at express temperature range
272468 –1
Figure 1 8XL5X Block Diagram
2
8XL52 54 58
PROCESS INFORMATION
The 8XL52 8XL54 8XL58 is manufactured on
P629 5 a CHMOS III-E process Additional process
and reliability information is available in Intel’s
Com-
ponents Quality and Reliability Handbook
Order
Number 210997
PACKAGES
Part
8XL5X
Prefix
N
S
Package Type
44-Pin PLCC
(OTP)
44-Pin QFP
(OTP)
272468– 2
PLCC
272468 –3
QFP
Figure 2 Pin Connections
3
8XL52 54 58
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 2
pins that are externally pulled low will source current
(I
IL
on the data sheet) because of the internal pull-
ups
Port 2 emits the high-order address byte during
fetches from external Program Memory and during
accesses to external Data Memory that use 16-bit
addresses (MOVX DPTR) In this application it
uses strong internal pullups when emitting 1’s Dur-
ing accesses to external Data Memory that use 8-bit
addresses (MOVX Ri) Port 2 emits the contents of
the P2 Special Function Register
Some Port 2 pins receive the high-order address bits
during OTP ROM programming and program verifi-
cation
Port 3 Port 3 is an 8-bit bidirectional I O port with
internal pullups The Port 3 output buffers can drive
several inputs Port 3 pins that have 1’s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 3
pins that are externally pulled low will source current
(I
IL
on the data sheet) because of the pullups
Port 3 also serves the functions of various special
features of the MCS-51 Family as listed below
Port Pin
P3 0
P3 1
P3 2
P3 3
P3 4
P3 5
P3 6
P3 7
Alternate Function
RXD (serial input port)
TXD (serial output port)
INT0 (external interrupt 0)
INT1 (external interrupt 1)
T0 (Timer 0 external input)
T1 (Timer 1 external input)
WR (external data memory write strobe)
RD (external data memory read strobe)
PIN DESCRIPTIONS
V
CC
Supply voltage
V
SS
Circuit ground
Port 0 Port 0 is an 8-bit open drain bidirectional I O
port As an output port each pin can sink several
inputs Port 0 pins that have 1’s written to them float
and in that state can be used as high-impedance
inputs
Port 0 is also the multiplexed low-order address and
data bus during accesses to external Program and
Data Memory In this application it uses strong inter-
nal pullups when emitting 1’s and can source and
sink several inputs
Port 0 also receives the code bytes during OTP
ROM programming and outputs the code bytes dur-
ing program verification External pullup resistors are
required during program verification
Port 1 Port 1 is an 8-bit bidirectional I O port with
internal pullups The Port 1 output buffers can drive
several inputs Port 1 pins that have 1’s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 1
pins that are externally pulled low will source current
(I
IL
on the data sheet) because of the internal pull-
ups
In addition Port 1 serves the functions of the follow-
ing special features of the 8XL5X
Port Pin
P1 0
Alternate Function
T2 (External Count
Input to Timer
Counter 2) Clock
Out
T2EX (Timer
Counter 2 Capture
Reload Trigger and
Direction Control)
P1 1
Port 1 receives the low-order address bytes during
OTP ROM programming and verifying
Port 2 Port 2 is an 8-bit bidirectional I O port with
internal pullups The Port 2 output buffers can drive
several inputs Port 2 pins that have 1’s written to
RST Reset input A high on this pin for two machine
cycles while the oscillator is running resets the de-
vice The port pins will be driven to their reset condi-
tion when a minimum V
IH2
voltage is applied wheth-
er the oscillator is running or not An internal pull-
down resistor permits a power-on reset with only a
capacitor connected to V
CC
4
8XL52 54 58
ALE Address Latch Enable output pulse for latching
the low byte of the address during accesses to ex-
ternal memory This pin (ALE PROG) is also the
program pulse input during OTP ROM programming
for the 87L5X
In normal operation ALE is emitted at a constant
rate of
the oscillator frequency and may be used
for external timing or clocking purposes Note how-
ever that one ALE pulse is skipped during each ac-
cess to external Data Memory
If desired ALE operation can be disabled by setting
bit 0 of SFR location 8EH With this bit set the pin is
weakly pulled high However the ALE disable fea-
ture will be suspended during a MOVX or MOVC in-
struction idle mode power down mode and ICE
mode The ALE disable feature will be terminated by
reset When the ALE disable feature is suspended or
terminated the ALE pin will no longer be pulled up
weakly Setting the ALE-disable bit has no affect if
the microcontroller is in external execution mode
Throughout the remainder of this data sheet ALE
will refer to the signal coming out of the ALE PROG
pin and the pin will be referred to as the ALE PROG
pin
PSEN Program Store Enable is the read strobe to
external Program Memory
When the 8XL5X is executing code from external
Program Memory PSEN is activated twice each ma-
chine cycle except that two PSEN activations are
skipped during each access to external Data Memo-
ry
EA V
PP
External Access enable EA must be
strapped to VSS in order to enable the device to
fetch code from external Program Memory locations
0000H to 0FFFH Note however that if either of the
Program Lock bits are programmed EA will be inter-
nally latched on reset
EA must be strapped to V
CC
for internal program
executions
This pin also receives the programming supply volt-
age (V
PP
) during OTP ROM programming
XTAL1 Input to the inverting oscillator amplifier
XTAL2 Output from the inverting oscillator amplifier
272468 –4
C1 C2
e
30 pF
g
10 pF for Crystals
For Ceramic Resonators contact resonator manufacturer
may be used More detailed information concerning
the use of the on-chip oscillator is available in Appli-
cation Note AP-155 ‘‘Oscillators for Microcontrol-
lers ’’
To drive the device from an external clock source
XTAL1 should be driven while XTAL2 floats as
shown in Figure 4 There are no requirements on the
duty cycle of the external clock signal since the in-
put to the internal clocking circuitry is through a di-
vide-by-two flip-flop but minimum and maximum
high and low times specified on the data sheet must
be observed
An external oscillator may encounter as much as a
100 pF load at XTAL1 when it starts up This is due
to interaction between the amplifier and its feedback
capacitance Once the external signal meets the V
IL
and V
IH
specifications the capacitance will not ex-
ceed 20 pF
Figure 3 Oscillator Connections
272468 –5
Figure 4 External Clock Drive Configuration
IDLE MODE
The user’s software can invoke the Idle Mode When
the microcontroller is in this mode power consump-
tion is reduced The Special Function Registers and
the onboard RAM retain their values during Idle but
the processor stops executing instructions Idle
Mode will be exited if the chip is reset or if an en-
abled interrupt occurs The PCA timer counter can
optionally be left running or paused during Idle
Mode
5
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output respec-
tively of a inverting amplifier which can be config-
ured for use as an on-chip oscillator as shown in
Figure 3 Either a quartz crystal or ceramic resonator
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