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IDT82V3011PV: 产品描述Telecom Circuit, 1-Func, PDSO56, SSOP-56; 产品类别无线/射频/通信电信电路; 文件大小370KB，共30页; 制造商IDT (Integrated Device Technology)

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IDT82V3011PV概述

Telecom Circuit, 1-Func, PDSO56, SSOP-56

IDT82V3011PV规格参数

参数名称	属性值
是否无铅	含铅
是否Rohs认证	不符合
厂商名称	IDT (Integrated Device Technology)
零件包装代码	SSOP
包装说明	SSOP-56
针数	56
Reach Compliance Code	not_compliant
JESD-30 代码	R-PDSO-G56
JESD-609代码	e0
长度	18.415 mm
湿度敏感等级	1
功能数量	1
端子数量	56
最高工作温度	85 °C
最低工作温度	-40 °C
封装主体材料	PLASTIC/EPOXY
封装代码	SSOP
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）	225
认证状态	Not Qualified
座面最大高度	2.794 mm
标称供电电压	3.3 V
表面贴装	YES
电信集成电路类型	TELECOM CIRCUIT
温度等级	INDUSTRIAL
端子面层	Tin/Lead (Sn85Pb15)
端子形式	GULL WING
端子节距	0.635 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	20
宽度	7.5 mm

IDT82V3011PV文档预览

T1/E1/OC3 WAN PLL WITH

SINGLE REFERENCE INPUT

FEATURES

• Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum

4 Enhanced and Stratum 4 timing for DS1 interfaces

• Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing

for E1 interface

• Selectable input reference: 8 kHz, 1.544 MHz, 2.048 MHz or 19.44

MHz

• Provides C1.5o,

C3o,

C2o,

C4o,

C6o, C8o,

C16o,

C19o and

C32o

output clock signals

• Provides 7 types of 8 kHz framing pulses:

F0o,

F8o,

F16o,

F19o,

F32o,

RSP and TSP

• Provides a C2/C1.5 output clock signal with the frequency

controlled by the reference input Fref

•

IDT82V3011

Holdover frequency accuracy of 0.025 ppm

Phase slope of 5 ns per 125 µs

Attenuates wander from 2.1 Hz

Fast lock mode

Provides Time Interval Error (TIE) correction

MTIE of 600 ns

JTAG boundary scan

Holdover status indication

Freerun status indication

Normal status indication

Lock status indication

Input reference quality indication

3.3 V operation with 5 V tolerant I/O

Package available: 56-pin SSOP

FUNCTIONAL BLOCK DIAGRAM

TDO

TDI

OSCi

TCLR

RST

C2/C1.5

TCK

TMS

TRST

FLOCK

JTAG

OSC

C32o

C19o

C19POS

C19NEG

C16o

C8o

C4o

C2o

TIE Control

Block

Virtual

Reference

DPLL

C3o

C1.5o

C6o

F0o

F8o

MON_out

Reference

Input Monitor

Invalid Input

Signal

Detection

F16o

F19o

F32o

RSP

TSP

LOCK

Fref

Feedback Signal

State Control Circuit

Input Frequency

Selection

TIE_en MODE_sel1 MODE_sel0 Normal Holdover Freerun

F_sel1 F_sel0

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDUSTRIAL TEMPERATURE RANGE

2003

Integrated Device Technology, Inc.

OCTOBER 22, 2003

DSC-6237/3

IDT82V3011 T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT

INDUSTRIAL TEMPERATURE RANGE

DESCRIPTION

The IDT82V3011 is a T1/E1/OC3 WAN PLL with single reference

input. It contains a Digital Phase-Locked Loop (DPLL), which generates

low jitter ST-BUS and 19.44 MHz clock and framing signals that are

phase locked to an 8 kHz, 1.544 MHz, 2.048 MHz or 19.44 MHz input

reference.

The IDT82V3011 provides 9 types of clock signals (C1.5o,

C3o,

C6o,

C2o,

C4o,

C8o,

C16o,

C19o,

C32o)

and 7 types of framing signals (F0o,

F8o,

F16o,

F19o,

F32o,

RSP, TSP) for multitrunk T1/E1 and STS3/OC3

links.

The IDT82V3011 is compliant with AT&T TR62411, Telcordia GR-

1244-CORE Stratum 4 Enhanced and Stratum 4, and ETSI ETS 300

011. It meets the jitter/wander tolerance, jitter/wander transfer, intrinsic

jitter/wander, frequency accuracy, capture range, phase change slope,

holdover frequency accuracy and MTIE (Maximum Time Interval Error)

requirements for these specifications.

The IDT82V3011 can be used in synchronization and timing control

for T1, E1 and OC3 systems, or used as ST-BUS clock and frame pulse

source. It also can be used in access switch, access routers, ATM edge

switches, wireless base station controllers, or IADs (Integrated Access

Devices), PBXs, line cards and SONET/SDH equipments.

PIN CONFIGURATION

MODE_sel0

MODE_sel1

TCLR

RST

Fref

MON_out

F_sel0

F_sel1

C6o

C1.5o

C3o

C2o

C4o

C19POS

C19NEG

C8o

C16o

C32o

TCK

TIE_en

IC2

C2/C1.5

IC0

HOLDOVER

FREERUN

OSCi

F19o

NORMAL

FLOCK

LOCK

C19o

TSP

RSP

F32o

F16o

F8o

F0o

TDI

TMS

TRST

TDO

IDT82V3011

Figure - 1 IDT82V3011 SSOP56 Package Pin Assignment

IDT82V3011 T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT

INDUSTRIAL TEMPERATURE RANGE

TABLE OF CONTENTS

Pin Description...................................................................................................................................................................................................7

Functional Description ......................................................................................................................................................................................9

2.1 State Control Circuit ..................................................................................................................................................................................9

2.1.1 Normal Mode..............................................................................................................................................................................10

2.1.2 Fast Lock Mode..........................................................................................................................................................................10

2.1.3 Holdover Mode ...........................................................................................................................................................................10

2.1.4 Freerun Mode.............................................................................................................................................................................10

2.2 Frequency Select Circuit .........................................................................................................................................................................10

2.3 Reference Input Monitor ..........................................................................................................................................................................10

2.4 Invalid Input Signal Detection ..................................................................................................................................................................10

2.5 TIE Control Block.....................................................................................................................................................................................11

2.6 DPLL Block..............................................................................................................................................................................................13

2.6.1 Phase Detector (PHD)................................................................................................................................................................13

2.6.2 Limiter.........................................................................................................................................................................................13

2.6.3 Loop Filter ..................................................................................................................................................................................13

2.6.4 Fraction Block.............................................................................................................................................................................13

2.6.5 Digital Control Oscillator (DCO)..................................................................................................................................................13

2.6.6 Lock Indicator .............................................................................................................................................................................13

2.6.7 Output Interface..........................................................................................................................................................................13

2.7 OSC.........................................................................................................................................................................................................13

2.7.1 Clock Oscillator ..........................................................................................................................................................................13

2.8 JTAG .......................................................................................................................................................................................................14

2.9 Reset Circuit ............................................................................................................................................................................................14

Measures of Performance ...............................................................................................................................................................................15

3.1 Intrinsic Jitter ...........................................................................................................................................................................................15

3.2 Jitter Tolerance........................................................................................................................................................................................15

3.3 Jitter Transfer ..........................................................................................................................................................................................15

3.4 Frequency Accuracy................................................................................................................................................................................15

3.5 Holdover Accuracy ..................................................................................................................................................................................15

3.6 Capture Range ........................................................................................................................................................................................15

3.7 Lock Range .............................................................................................................................................................................................15

3.8 Phase Slope ............................................................................................................................................................................................15

3.9 Time Interval Error (TIE)..........................................................................................................................................................................15

3.10 Maximum Time Interval Error (MTIE) ......................................................................................................................................................15

3.11 Phase Continuity .....................................................................................................................................................................................16

3.12 Phase Lock Time.....................................................................................................................................................................................16

Absolute Maximum Ratings ............................................................................................................................................................................17

Recommended DC Operating Conditions .....................................................................................................................................................17

DC Electrical Characteristics ..........................................................................................................................................................................17

6.1 Single End Input/Output Port...................................................................................................................................................................17

6.2 Differential Output Port (LVDS) ...............................................................................................................................................................18

AC Electrical Characteristics ..........................................................................................................................................................................19

7.1 Performance ............................................................................................................................................................................................19

7.2 Intrinsic Jitter Unfiltered ...........................................................................................................................................................................20

7.3 C1.5o (1.544 MHz) Intrinsic Jitter Filtered ...............................................................................................................................................20

7.4 C2o (2.048 MHz) Intrinsic Jitter Filtered ..................................................................................................................................................20

7.5 C19o (19.44 MHz) Intrinsic Jitter Filtered ................................................................................................................................................20

7.6 8 kHz Input to 8 kHz Output Jitter Transfer .............................................................................................................................................21

7.7 1.544 MHz Input to 1.544 MHz Output Jitter Transfer.............................................................................................................................21

7.8 2.048 MHz Input to 2.048 MHz Output Jitter Transfer.............................................................................................................................21

7.9 19.44 MHz Input to 19.44 MHz Output Jitter Transfer.............................................................................................................................22

7.10 8 kHz Input Jitter Tolerance.....................................................................................................................................................................22

IDT82V3011 T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT

INDUSTRIAL TEMPERATURE RANGE

7.11 1.544 MHz Input Jitter Tolerance ............................................................................................................................................................22

7.12 2.048 MHz Input Jitter Tolerance ............................................................................................................................................................23

7.13 19.44 MHz Input Jitter Tolerance ............................................................................................................................................................23

Timing Characteristics ....................................................................................................................................................................................25

8.1 Timing Parameter Measurement Voltage Levels ....................................................................................................................................25

8.2 Input/Output Timing .................................................................................................................................................................................25

Ordering Information .......................................................................................................................................................................................30

IDT82V3011 T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT

INDUSTRIAL TEMPERATURE RANGE

LIST OF FIGURES

Figure - 1

Figure - 2

Figure - 3

Figure - 4

Figure - 5

Figure - 6

Figure - 7

Figure - 8

Figure - 9

Figure - 10

Figure - 11

Figure - 12

Figure - 13

Figure - 14

IDT82V3011 SSOP56 Package Pin Assignment ................................................................................................................................ 2

State Control Circuit ............................................................................................................................................................................ 9

State Control Diagram......................................................................................................................................................................... 9

TIE Control Block Diagram................................................................................................................................................................ 11

Reference Switch with TIE Control Block Enabled............................................................................................................................ 11

Reference Switch with TIE Control Block Disabled........................................................................................................................... 12

DPLL Block Diagram ......................................................................................................................................................................... 12

Clock Oscillator Circuit ...................................................................................................................................................................... 14

Power-Up Reset Circuit..................................................................................................................................................................... 14

Timing Parameter Measurement Voltage Levels .............................................................................................................................. 25

Input to Output Timing (Normal Mode).............................................................................................................................................. 27

Output Timing 1................................................................................................................................................................................. 28

Output Timing 2................................................................................................................................................................................. 29

Input Control Setup and Hold Timing ................................................................................................................................................ 29

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IDT82V3011PV

IDT82V3011PV概述

IDT82V3011PV规格参数

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