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IDT70P25L25BY: 产品描述Dual-Port SRAM, 8KX16, 25ns, CMOS, PBGA100, 0.50 MM PITCH, FPBGA-100; 产品类别存储存储; 文件大小289KB，共22页; 制造商IDT (Integrated Device Technology)

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IDT70P25L25BY概述

Dual-Port SRAM, 8KX16, 25ns, CMOS, PBGA100, 0.50 MM PITCH, FPBGA-100

IDT70P25L25BY规格参数

参数名称	属性值
是否无铅	含铅
是否Rohs认证	不符合
厂商名称	IDT (Integrated Device Technology)
零件包装代码	BGA
包装说明	BGA,
针数	100
Reach Compliance Code	not_compliant
ECCN代码	EAR99
最长访问时间	25 ns
JESD-30 代码	S-PBGA-B100
JESD-609代码	e0
内存密度	131072 bit
内存集成电路类型	DUAL-PORT SRAM
内存宽度	16
湿度敏感等级	3
功能数量	1
端子数量	100
字数	8192 words
字数代码	8000
工作模式	ASYNCHRONOUS
最高工作温度	70 °C
最低工作温度
组织	8KX16
封装主体材料	PLASTIC/EPOXY
封装代码	BGA
封装形状	SQUARE
封装形式	GRID ARRAY
并行/串行	PARALLEL
峰值回流温度（摄氏度）	225
认证状态	Not Qualified
最大供电电压 (Vsup)	1.9 V
最小供电电压 (Vsup)	1.7 V
标称供电电压 (Vsup)	1.8 V
表面贴装	YES
技术	CMOS
温度等级	COMMERCIAL
端子面层	Tin/Lead (Sn/Pb)
端子形式	BALL
端子位置	BOTTOM
处于峰值回流温度下的最长时间	20

IDT70P25L25BY文档预览

HIGH-SPEED 1.8V

8/4K x 18 DUAL-PORT

8/4K x 16 DUAL-PORT

STATIC RAM

Features

◆

ADVANCED

IDT70P35/34L

IDT70P25/24L

◆

True Dual-Ported memory cells which allow simultaneous

reads of the same memory location

High-speed access

IDT70P35/34L (IDT70P25/24L)

– Commercial: 20/25ns (max.)

– Industrial: 25ns (max.)

Low-power operation

IDT70P35/34L (IDT70P25/24L)

Active: 30.6mW (typ.)

Standby: 5.4mW (typ.)

Separate upper-byte and lower-byte control for multiplexed

bus compatibility

IDT70P35/34L (IDT70P25/24L) easily expands data bus

width to 36 bits (32 bits) or more using the Master/Slave

◆

select when cascading more than one device

M/S = V

for

BUSY

output flag on Master

M/S = V

for

BUSY

input on Slave

BUSY

and Interrupt Flag

On-chip port arbitration logic

Full on-chip hardware support of semaphore signaling

between ports

Fully asynchronous operation from either port

LVTTL-compatible, single 1.8V (±100mV) power supply

Available in a 100-pin Thin Quad Flatpack (TQFP) package,

100-pin 0.8mm pitch Ball Grid Array (fpBGA), and 100-pin

0.5mm pitch BGA (fpBGA)

Industrial temperature range (-40°C to +85°C) is available

for selected speeds

Functional Block Diagram

R/W

I/O

-I/O

17L

(5)

I/O

-I/O

(4)

BUSY

12L

(1)

(2,3)

I/O

-I/O

17R

(5)

I/O

Control

I/O

Control

I/O

-I/O

(4)

BUSY

(2,3)

Address

Decoder

MEMORY

ARRAY

Address

Decoder

12R

(1)

R/W

SEM

(3)

INT

NOTES:

1. A

is a NC for IDT70P34 and IDT70P24.

2. (MASTER):

BUSY

is output; (SLAVE):

BUSY

is input.

BUSY

outputs and

INT

outputs are non-tri-stated push-pull.

4. I/O

x - I/O

x for IDT70P25/24.

5. I/O

x - I/O

x for IDT70P25/24.

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

R/W

SEM

INT

(3)

5683 drw 01

M/S

FEBRUARY 2004

DSC-5683/2

IDT70P35/34L(IDT70P25/24L)

High-Speed 1.8V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM

ADVANCED

Industrial and Commercial Temperature Ranges

The IDT70P35/34L (IDT70P25/24L) is a high-speed 8/4K x 18

(8/4K x 16) Dual-Port Static RAM. The IDT70P35/34L (IDT70P25/24L)

is designed to be used as a stand-alone Dual-Port RAM or as a

combination MASTER/SLAVE Dual-Port RAM for 36-bit (32-bit) or wider

memory system applications results in full-speed, error-free operation

without the need for additional discrete logic.

This device provides two independent ports with separate control,

address, and I/O pins that permit independent, asynchronous access for

Description

reads or writes to any location in memory. An automatic power down

feature controlled by

permits the on-chip circuitry of each port to enter

a very low standby power mode.

Fabricated using IDT’s CMOS high-performance technology, these

devices typically operate on only 30.6mW of power.

The IDT70P35/34L (IDT70P25/24L) is packaged in a plastic 100-pin

Thin Quad Flatpack, a 100-pin fine pitch Ball Grid Array, and a 100-pin

0.5mm pitch

fpBGA.

IDT70P35/34 Pin Configurations

(1,2,3,4)

12/17/03

Index

N/C

I/O

17L

I/O

11L

I/O

12L

I/O

13L

I/O

14L

Vss

I/O

15L

I/O

16L

Vss

I/O

17R

N/C

100 99 98 9796 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76

I/O

10L

I/O

Vss

I/O

R/W

SEM

12L

(1)

11L

10L

IDT70P35/34PF

PN100-1

(5)

100-Pin TQFP

Top View

(6)

26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

N/C

INT

BUSY

Vss

M/S

BUSY

INT

N/C

5683 drw 02

NOTES:

1. A

is a NC for IDT70P34.

2. All V

pins must be connected to power supply.

3. All V

pins must be connected to ground.

4. PN100-1 package body is approximately 14mm x 14mm x 1.4mm.

5. This package code is used to reference the package diagram.

6. This text does not indicate orientation of the actual part marking.

I/O

10R

I/O

11R

I/O

12R

I/O

13R

I/O

14R

I/O

15R

Vss

I/O

16R

R/W

Vss

SEM

12R

(1)

11R

10R

6.42

IDT70P35/34L (IDT70T25/24L)

High-Speed 1.8V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM

ADVANCED

Industrial and Commercial Temperature Ranges

IDT70P35/34 Pin Configurations(cont'd)

(1,2,3,4)

IDT70P35/34BF

BF100

(5)

100-Pin fpBGA

Top View

(6)

12/16/03

A10

12R(1)

I/O

13R

I/O

10R

I/O

B10

10R

SEM

R/W

I/O

12R

I/O

C10

I/O

16R

I/O

15R

I/O

11R

I/O

D10

INT

11R

I/O

14R

I/O

17R

I/O

E10

M/S

BUSY

I/O

F10

BUSY

I/O

14L

I/O

15L

I/O

16L

INT

I/O

12L

I/O

13L

H10

G10

10L

I/O

17L

I/O

11L

J10

11L

SEM

R/W

I/O

10L

K10

12L(1)

I/O

5683 drw 03

NOTES:

1. A

is a NC for IDT70P34.

2. All V

pins must be connected to power supply.

3. All V

pins must be connected to ground.

4. BF-100 package body is approximately 10mm x 10mm x 1.4mm with 0.8mm ball pitch.

5. This package code is used to reference the package diagram.

6. This text does not indicate orientation of the actual part marking.

6.42

IDT70P35/34L(IDT70P25/24L)

High-Speed 1.8V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM

ADVANCED

Industrial and Commercial Temperature Ranges

IDT70P25/24 Pin Configurations

(1,2,3,4)

Index

N/C

I/O

10L

I/O

11L

I/O

12L

I/O

13L

I/O

14L

I/O

15L

I/O

N/C

100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76

I/O

R/W

SEM

12L

(1)

11L

10L

IDT70P25/24PF

PN100-1

(5)

100-Pin TQFP

Top View

(6)

26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

12/17/03

N/C

INT

BUSY

M/S

BUSY

INT

N/C

5683 drw 04

NOTES:

1. A

is a NC for IDT70P24.

2. All V

pins must be connected to power supply.

3. All V

pins must be connected to ground.

4. PN100-1 package body is approximately 14mm x 14mm x 1.4mm.

5. This package code is used to reference the package diagram.

6. This text does not indicate orientation of the actual part marking.

I/O

10R

I/O

11R

I/O

12R

I/O

13R

I/O

14R

I/O

15R

R/W

SEM

12R

(1)

11R

10R

6.42

IDT70P35/34L (IDT70T25/24L)

High-Speed 1.8V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM

ADVANCED

Industrial and Commercial Temperature Ranges

IDT70P25/24 Pin Configurations(cont'd)

(1,2,3,4)

IDT70P25/24BF

BF100

(5)

100-Pin fpBGA

Top View

(6)

12/16/03

A10

12R(1)

I/O

12R

I/O

B10

10R

SEM

R/W

I/O

11R

I/O

C10

I/O

15R

I/O

14R

I/O

10R

I/O

D10

INT

11R

I/O

13R

I/O

E10

M/S

BUSY

I/O

F10

BUSY

I/O

13L

I/O

14L

I/O

15L

G10

INT

I/O

11L

I/O

12L

H10

10L

I/O

10L

J10

11L

SEM

R/W

I/O

K10

12L(1)

I/O

5683 drw 05

NOTES:

1. A

is a NC for IDT70P24.

2. All V

pins must be connected to power supply.

3. All V

pins must be connected to ground.

4. BF-100 package body is approximately 10mm x 10mm x 1.4mm with 0.8mm ball pitch.

5. This package code is used to reference the package diagram.

6. This text does not indicate orientation of the actual part marking.

6.42

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IDT70P25L25BY

IDT70P25L25BY概述

IDT70P25L25BY规格参数

IDT70P25L25BY文档预览

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