DUAL 2:1 AND 1:2,
DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
ICS85354
General Description
The ICS85354 is a dual 2:1 and 1:2 Multiplexer and
a member of the HiPerClockS
TM
family of high
HiPerClockS™
performance clock solutions from IDT. The 2:1
Multiplexer allows one of 2 inputs to be selected
onto one output pin and the 1:2 MUX switches one
input to one of two outputs. This device is useful for multiplexing
multi-rate Ethernet PHYs which have 100 M bit and 1000 bit
transmit/receive pairs onto an optical SFP module which has a
single transmit/receive pair. See Application Section for further
information.
Features
•
•
•
•
•
•
•
•
•
Three LVPECL outputs
Three differential clock inputs
CLKx/CLKx pairs can accept the following differential input
levels: LVPECL, LVDS, CML
Maximum output frequency: 3.2GHz
Part-to-part skew: 200ps (maximum)
Propagation delay: QA/QA: 450ps (maximum)
QBx/QBx: 430ps (maximum)
LVPECL mode operating voltage supply range:
V
CC
= 2.375V to 3.465V, V
EE
= 0V
ECL mode operating voltage supply range:
V
CC
= 0V, V
EE
= -3.465V to -2.375V-40°C to 85°C ambient
operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
ICS
The ICS85354 is optimized for applications requiring very high
performance and has a maximum operating frequency of 3GHz.
The device is packaged in a small, 3mm x 3mm VFQFN package,
making it ideal for use on space-constrained boards.
Block Diagram
CLK_SELA
Pulldown
Pin Assignment
CLK_SELA
V
CC
QA
QA
CLKA0
Pulldown
CLKA0
Pullup/Pulldown
CLKA1
Pulldown
CLKA1
Pullup/Pulldown
0
QA
QA
1
QB0 1
QB0
2
16 15 14 13
12 CLKA0
11 CLKA0
10 CLKA1
9 CLKA1
5
CLKB
QB1 3
QB1 4
6
CLKB
7
CLK_SELB
8
V
EE
CLKB
Pulldown
CLKB
Pullup/Pulldown
QB0
QB0
ICS85354
16-Lead VFQFN
3mm x 3mm x 0.95mm
package body
K Package
Top View
CLK_SELB
Pulldown
QB1
QB1
IDT™ / ICS™
LVPECL/ECL MULTIPLEXER
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ICS85354AK REV. C NOVEMBER 04, 2008
ICS85354
DUAL 2:1 AND 1:2, DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
Table 1. Pin Descriptions
Number
1, 2
3, 4
5
6
7
8
9
10
11
12
13
14
15, 16
Name
QB0/QB0
QB1/QB1
CLKB
CLKB
CLK_SELB
V
EE
CLKA1
CLKA1
CLKA0
CLKA0
V
CC
CLK_SELA
QA/QA
Output
Output
Input
Input
Input
Power
Input
Input
Input
Input
Power
Input
Output
Pulldown
Pullup/
Pulldown
Pulldown
Pullup/
Pulldown
Pulldown
Pulldown
Pullup/
Pulldown
Pulldown
Type
Description
Differential output pair. LVPECL/ECL interface levels.
Differential output pair. LVPECL/ECL interface levels.
Non-inverting LVPECL/ECL differential clock input.
Inverting differential LVPECL clock input. V
CC
/2 default when left floating.
Clock select pin for QBx outputs. When HIGH, selects QB1/QB1 outputs.
When LOW, selects QB0/QB0 outputs. LVCMOS/LVTTL interface levels.
Negative supply pin.
Inverting differential LVPECL clock input. V
CC
/2 default when left floating.
Non-inverting LVPECL/ECL differential clock input.
Inverting differential LVPECL clock input. V
CC
/2 default when left floating.
Non-inverting LVPECL/ECL differential clock input.
Positive supply pin.
Clock select pin for QA output. When HIGH, selects QA output. When LOW,
selects QA output. LVCMOS/LVTTL interface levels.
Differential output pair. LVPECL/ECL interface levels.
NOTE:
Pullup and Pulldown
refer to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
R
PULLDOWN
R
VCC/2
Parameter
Input Pulldown Resistor
Pullup/Pulldown Resistor
Test Conditions
Minimum
Typical
37.5
37.5
Maximum
Units
k
Ω
k
Ω
Function Tables
Table 3A. Control Input Function Table, (Bank A)
Bank A
Control Input
CLK_SELA
0
1
Outputs
QA/QA
Selects CLKA0/CLKA0
Selects CLKA1/CLKA1
Control Input
CLK_SELB
0
1
Outputs
QB0/QB0
Follows CLKB input
Low
QB1/QB1
Low
Follows CLKB input
Table 3B. Control Input Function Table, (Bank B)
Bank B
IDT™ / ICS™
LVPECL/ECL MULTIPLEXER
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ICS85354
DUAL 2:1 AND 1:2, DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
CC
Negative Supply Voltage, V
EE
Inputs, V
I
(LVPECL mode)
Inputs, V
I
(ECL mode)
Outputs, I
O
Continuos Current
Surge Current
Operating Termperature Range, T
A
Storage Temperature, T
STG
Package Thermal Impedance,
θ
JA
Rating
4.6V (LVPECL mode, V
EE
= 0V)
-4.6V (ECL mode, V
CC
= 0V)
-0.5V to V
CC
+ 0.5V
0.5V to V
EE
– 0.5V
50mA
100mA
-40°C to 85°C
-65°C to 150°C
51.5°C/W (0 lfpm)
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, V
CC
= 2.375V to 3.465V, V
EE
= 0V or V
CC
= 0V, V
EE
= -3.465V to -2.375V,
T
A
= -40°C to 85°C
Symbol
V
CC
I
EE
Parameter
Positive Supply Voltage
2.375
Power Supply Current
2.5
2.625
50
V
mA
Test Conditions
Minimum
3.135
Typical
3.3
Maximum
3.465
Units
V
Table 4B. LVCMOS/LVTTL DC Characteristics, V
CC
= 2.375V to 3.465V, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
CLK_SELA,
CLK_SELB
CLK_SELA,
CLK_SELB
V
CC
= V
IN
V
CC
= V
IN
-150
Test Conditions
Minimum
0.7V
CC
-0.3
Typical
Maximum
V
CC
+ 0.3
0.3V
CC
150
Units
V
V
µA
µA
IDT™ / ICS™
LVPECL/ECL MULTIPLEXER
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DUAL 2:1 AND 1:2, DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
Table 4C. LVCMOS/LVTTL DC Characteristics, V
CC
= 0V, V
EE
= -3.465V to -2.375V, T
A
= -40°C to 85°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
CLK_SELA,
CLK_SELB
CLK_SELA,
CLK_SELB
V
CC
= V
IN
V
CC
= V
IN
-150
Test Conditions
Minimum
0.3V
EE
V
EE
– 0.3
Typical
Maximum
0.3
0.7V
EE
150
Units
V
V
µA
µA
Table 4D. LVPECL DC Characteristics, V
CC
= 2.375V to 3.465V, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
I
IH
Parameter
CLKA[0:1], CLKB
Input High Current
CLKA[0:1], CLKB
CLKA[0:1], CLKB
I
IL
Input Low Current
CLKA[0:1], CLKB
V
PP
V
CMR
V
OH
V
OL
V
SWING
Peak-to-Peak Input Voltage
Common Mode Input Voltage;
NOTE 1, 2
Output High Current; NOTE 3
Output Low Current; NOTE 3
Peak-to-Peak Output Voltage Swing
Test Conditions
V
CC
= V
IN
V
CC
= V
IN
V
CC
= 3.465V,
V
IN
= 0V
V
CC
= 3.465V,
V
IN
= 0V
-200
-200
0.15
1.2
V
CC
– 1.125
V
CC
– 1.895
0.6
V
CC
– 1.005
V
CC
– 1.78
1.2
V
CC
V
CC
– 0.92
V
CC
– 1.62
1.0
Minimum
Typical
Maximum
200
200
Units
µA
µA
µA
µA
V
V
V
V
V
NOTE 1: Common mode input voltage is defined as V
IH
.
NOTE 2: For single-ended applications, the maximum input voltage for CLKx, CLKx is V
CC
+ 0.3V.
NOTE 3: Outputs terminated with 50Ω to V
CC
– 2V.
IDT™ / ICS™
LVPECL/ECL MULTIPLEXER
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ICS85354AK REV. C NOVEMBER 04, 2008
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DUAL 2:1 AND 1:2, DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
AC Electrical Characteristics
Table 5. AC Characteristics, V
CC
= 2.375V to 3.465V, V
EE
= 0V or V
CC
= 0V, V
EE
= -3.465V to -2.375V,
T
A
= -40°C to 85°C
Parameter
f
MAX
t
PD
tsk(pp)
MUX_
ISOLATION
t
R
/ t
F
Symbol
Output Frequency
Propagation Delay;
NOTE 1
QA/QA
QBx/QBx
225
195
335
305
55
20% to 80%
75
155
245
Test Conditions
Minimum
Typical
Maximum
3.2
445
420
200
Units
GHz
ps
ps
ps
dB
ps
Part-to-Part Skew; NOTE 2, 3
MUX Isolation; NOTE 4
Output Rise/Fall Time
All parameters are measured
≤
1GHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions.
Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: Measured using standard LVPECL input at 622MHz.
IDT™ / ICS™
LVPECL/ECL MULTIPLEXER
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ICS85354AK REV. C NOVEMBER 04, 2008