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MX25L3208EM2I-12G: 产品描述Flash, 16MX2, PDSO8, 0.200 INCH, HALOGEN FREE AND ROHS COMPLIANT, SOP-8; 产品类别存储存储; 文件大小750KB，共47页; 制造商Macronix; 官网地址http://www.macronix.com/en-us/Pages/default.aspx; 标准

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MX25L3208EM2I-12G概述

Flash, 16MX2, PDSO8, 0.200 INCH, HALOGEN FREE AND ROHS COMPLIANT, SOP-8

MX25L3208EM2I-12G规格参数

参数名称	属性值
是否Rohs认证	符合
厂商名称	Macronix
零件包装代码	SOIC
包装说明	0.200 INCH, HALOGEN FREE AND ROHS COMPLIANT, SOP-8
针数	8
Reach Compliance Code	unknown
ECCN代码	3A991.B.1.B.1
备用内存宽度	1
最大时钟频率 (fCLK)	86 MHz
数据保留时间-最小值	20
耐久性	100000 Write/Erase Cycles
JESD-30 代码	R-PDSO-G8
长度	5.28 mm
内存密度	33554432 bit
内存集成电路类型	FLASH
内存宽度	2
功能数量	1
端子数量	8
字数	16777216 words
字数代码	16000000
工作模式	SYNCHRONOUS
最高工作温度	85 °C
最低工作温度	-40 °C
组织	16MX2
封装主体材料	PLASTIC/EPOXY
封装代码	SOP
封装等效代码	SOP8,.3
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE
并行/串行	SERIAL
峰值回流温度（摄氏度）	NOT SPECIFIED
电源	3/3.3 V
编程电压	3.3 V
认证状态	Not Qualified
座面最大高度	2.16 mm
串行总线类型	3-WIRE
最大待机电流	0.00002 A
最大压摆率	0.025 mA
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	2.7 V
标称供电电压 (Vsup)	3.3 V
表面贴装	YES
技术	CMOS
温度等级	INDUSTRIAL
端子形式	GULL WING
端子节距	1.27 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	NOT SPECIFIED
类型	NOR TYPE
宽度	5.23 mm
写保护	HARDWARE/SOFTWARE

MX25L3208EM2I-12G文档预览

MX25L3208E

DATASHEET

P/N: PM1614

REV. 1.2, NOV. 28, 2013

MX25L3208E

Contents

FEATURES .................................................................................................................................................................. 5

GENERAL DESCRIPTION ......................................................................................................................................... 6

PIN CONFIGURATIONS ............................................................................................................................................. 7

PIN DESCRIPTION ...................................................................................................................................................... 7

BLOCK DIAGRAM....................................................................................................................................................... 8

MEMORY ORGANIZATION ......................................................................................................................................... 9

Table 1. Memory Organization ............................................................................................................................ 9

DEVICE OPERATION ................................................................................................................................................ 10

Figure 1.

Serial Modes Supported ....................................................................................................... 10

DATA PROTECTION.................................................................................................................................................. 11

Table 2. Protected Area Sizes ............................................................................................................................ 12

HOLD FEATURES ..................................................................................................................................................... 13

Figure 2. Hold Condition Operation

........................................................................................................ 13

COMMAND DESCRIPTION ....................................................................................................................................... 14

Table 4. COMMAND DEFINITION ..................................................................................................................... 14

(1) Write Enable (WREN) ................................................................................................................................... 15

(2) Write Disable (WRDI) .................................................................................................................................... 15

(3) Read Status Register (RDSR) ...................................................................................................................... 15

(4) Write Status Register (WRSR)...................................................................................................................... 16

Table 5. Protection Modes .................................................................................................................................. 17

(5) Read Data Bytes (READ) ............................................................................................................................. 18

(6) Read Data Bytes at Higher Speed (FAST_READ) ....................................................................................... 18

(7) Dual Output Mode (DREAD) ......................................................................................................................... 18

(8) Sector Erase (SE) ......................................................................................................................................... 18

(9) Block Erase (BE)........................................................................................................................................... 19

(10) Chip Erase (CE) .......................................................................................................................................... 19

(11) Page Program (PP) ..................................................................................................................................... 19

(12) Deep Power-down (DP) .............................................................................................................................. 20

(13) Release from Deep Power-down (RDP), Read Electronic Signature (RES) ............................................. 20

(14) Read Identification (RDID)

.......................................................................................................................... 21

(15) Read Electronic Manufacturer ID & Device ID (REMS) .............................................................................. 21

Table 6. ID DEFINITIONS ................................................................................................................................. 21

(16)

Enter Secured Area (ENSA) ........................................................................................................ 21

(17)

Exit Secured Area (EXSA)........................................................................................................... 21

(18) Read Security Register (RDSCUR) ............................................................................................................ 22

Table 7. SECURITY REGISTER DEFINITION ................................................................................................... 22

(19) Write Security Register (WRSCUR) ............................................................................................................ 22

POWER-ON STATE ................................................................................................................................................... 23

P/N: PM1614

REV. 1.2, NOV. 28, 2013

MX25L3208E

ELECTRICAL SPECIFICATIONS .............................................................................................................................. 24

ABSOLUTE MAXIMUM RATINGS ..................................................................................................................... 24

Figure 3.Maximum Negative Overshoot Waveform ........................................................................................... 24

CAPACITANCE TA = 25°C, f = 1.0 MHz............................................................................................................. 24

Figure 4. Maximum Positive Overshoot Waveform ............................................................................................ 24

Figure 5. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL.............................................................. 25

Figure 6. OUTPUT LOADING ........................................................................................................................... 25

Table 8. DC CHARACTERISTICS...................................................................................................................... 26

Table 9. AC CHARACTERISTICS ...................................................................................................................... 27

Timing Analysis ........................................................................................................................................................ 28

Figure 7. Serial Input Timing .............................................................................................................................. 28

Figure 8. Output Timing ...................................................................................................................................... 28

Figure 9. Hold Timing ......................................................................................................................................... 29

Figure 10. WP# Disable Setup and Hold Timing during WRSR when SRWD=1 ............................................... 29

Figure 11. Write Enable (WREN) Sequence (Command 06) ............................................................................. 30

Figure 12. Write Disable (WRDI) Sequence (Command 04).............................................................................. 30

Figure 13. Read Status Register (RDSR) Sequence (Command 05) ................................................................ 31

Figure 14. Write Status Register (WRSR) Sequence (Command 01)............................................................... 31

Figure 15. Read Data Bytes (READ) Sequence (Command 03) ...................................................................... 31

Figure 16. Read at Higher Speed (FAST_READ) Sequence (Command 0B)................................................... 32

Figure 17. Dual Output Read Mode Sequence (Command 3B) ......................................................................... 33

Figure 18. Sector Erase (SE) Sequence (Command 20) .................................................................................. 33

Figure 19. Block Erase (BE) Sequence (Command 52 or D8) .......................................................................... 33

Figure 20. Chip Erase (CE) Sequence (Command 60 or C7) ........................................................................... 34

Figure 21. Page Program (PP) Sequence (Command 02)................................................................................ 34

Figure 22. Deep Power-down (DP) Sequence (Command B9)......................................................................... 35

Figure 23. Release from Deep Power-down (RDP) Sequence (Command AB) ............................................... 35

Figure 24. Read Electronic Signature (RES) Sequence (Command AB) .......................................................... 35

Figure 25. Read Identification (RDID) Sequence (Command 9F)

...................................................................... 36

Figure 26. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90).............................. 36

Figure 27. Program/Erase flow with read array data

.......................................................................................... 37

Figure 28. Power-up Timing ............................................................................................................................... 38

Table 10. Power-Up Timing ............................................................................................................................... 38

OPERATING CONDITIONS ....................................................................................................................................... 39

Figure 29. AC Timing at Device Power-Up ......................................................................................................... 39

Figure 30. Power-Down Sequence .................................................................................................................... 40

ERASE AND PROGRAMMING PERFORMANCE .................................................................................................... 41

DATA RETENTION .................................................................................................................................................... 41

LATCH-UP CHARACTERISTICS .............................................................................................................................. 41

P/N: PM1614

REV. 1.2, NOV. 28, 2013

MX25L3208E

ORDERING INFORMATION ...................................................................................................................................... 42

PART NAME DESCRIPTION ..................................................................................................................................... 43

PACKAGE INFORMATION ........................................................................................................................................ 44

REVISION HISTORY ................................................................................................................................................. 46

P/N: PM1614

REV. 1.2, NOV. 28, 2013

MX25L3208E

32M-BIT [x 1 / x 2] CMOS SERIAL FLASH

FEATURES

GENERAL

• Single Power Supply Operation

- 2.7 to 3.6 volt for read, erase, and program operations

• Serial Peripheral Interface compatible -- Mode 0 and Mode 3

•

33,554,432 x 1 bit structure or 16,777,216 x 2 bits (Dual Output mode) structure

• 1024 Equal Sectors with 4K byte each

- Any Sector can be erased individually

• 64 Equal Blocks with 64K byte each

- Any Block can be erased individually

• Program Capability

- Byte base

- Page base (256 bytes)

• Latch-up protected to 100mA from -1V to Vcc +1V

PERFORMANCE

• High Performance

- Fast access time: 86MHz serial clock

- Serial clock of Dual Output mode : 80MHz

- Fast program time: 0.6ms(typ.) and 3ms(max.)/page

- Byte program time: 9us (typical)

- Fast erase time: 40ms(typ.) /sector ; 0.4s(typ.) /block

• Low Power Consumption

- Low active read current: 25mA(max.) at 86MHz

- Low active programming current: 15mA (typ.)

- Low active sector erase current: 9mA (typ.)

- Standby current: 15uA (typ.)

- Deep power-down mode 2uA (typical)

• Typical 100,000 erase/program cycles

• 20 years of data retention

SOFTWARE FEATURES

• Input Data Format

- 1-byte Command code

• Advanced Security Features

- Block lock protection

The BP3~BP0 status bit defines the size of the area to be software protection against program and erase instruc-

tions

- Additional 512 bits secured area for unique ID

• Auto Erase and Auto Program Algorithm

Automatically erases and verifies data at selected sector

Automatically programs and verifies data at selected page by an internal algorithm that automatically times the

program pulse widths (Any page to be programed should have page in the erased state first)

P/N: PM1614

REV. 1.2, NOV. 28, 2013

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MX25L3208EM2I-12G

MX25L3208EM2I-12G概述

MX25L3208EM2I-12G规格参数

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