MV Series
14 DIP, 5.0 Volt, HCMOS/TTL, VCXO
•
General purpose VCXO for Phase
Lock Loops (PLL), Clock Recovery,
Reference Signal Tracking and
Synthesizers
•
Frequencies up to 160 MHz and tri-
state option
*Contact factory for availability.
Pin Connections
1.
2.
3.
4.
Frequencies above 90 MHz utilize a PLL design. Fundamental and PLL designs are available for other frequencies. Contact factory.
TTL load - see load circuit diagram #1 on page 116. HCMOS load - see load circuit diagram #2 on page 116.
Symmetry is measured at 1.4 V with TTL load, and at 50% with HCMOS load.
Rise/Fall times are measured between 0.5 V and 2.4 V for TTL load, and between 10% Vdd and 90% Vdd for HCMOS load.
MtronPTI reserves the right to make changes to the product(s) and service(s) described herein without notice. No liability is assumed as a result of their use or application.
Please see
www.mtronpti.com
for our complete offering and detailed datasheets. Contact us for your application specific requirements: MtronPTI
1-800-762-8800.
66
FPGA/CPLD
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