KM616FS2000Z, KM616FR2000Z Family
Document Title
128Kx16 Super Low Power and Low Voltage
Full CMOS SRAM Data Sheets for 48-CSP
Preliminary
CMOS SRAM
Revision History
Revision No.
0.0
History
Initialize
- Package dimension finalized
Revised
- Change speed marking method
Marking was indicate speed at high power, that change to speed at low
power
Revised
- Remove commercial products.
Draft Data
February. 4, 1997
Remark
Preliminary
0.1
April. 17, 1997
Preliminary
0.2
August 17, 1998
Preliminary
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
Revision 0.2
August 1998
KM616FS2000Z, KM616FR2000Z Family
Preliminary
CMOS SRAM
128Kx16bit Super Low Power and Low Voltage Full CMOS SRAM
with 48-CSP(Chip Scale Package)
FEATURES SUMMARY
•
Process Technology : Full CMOS
•
Organization :128Kx16
•
Power Supply Voltage
KM616FS2000Z Family : 2.3V(Min) ~ 3.3V(Max)
KM616FR2000Z Family : 1.8V(Min) ~ 2.7V(Max)
•
Low Data Retention Voltage : 1.5V(Min)
•
Three state output status and TTL Compatible
•
Package Type : 48-CSP with 0.75mm ball pitch
GENERAL DESCRIPTION
The KM616FS2000Z and KM616FR2000Z family are fab-
ricated by SAMSUNG′s advanced Full CMOS process tech-
nology. The family support various operating temperature
ranges and has very small size with 0.75 ball pitch and 6 x 8
ball array. The family also support low data retention volt-
age for battery back-up operation with low data retention
current.
PRODUCT FAMILY
Power Dissipation
Product Family Operating Temperature Vcc Range
Speed(ns)
Standby
Operating
(I
SB1
, Max) (I
CC2
, Max)
80mA
50mA
25mA
PKG Type
KM616FS2000ZI
KM616FR2000ZI
Industrial(-40~85°C)
2.3~3.3V
1.8~2.7V
100
1)
@V
CC
=3.0±0.3V
150
1)
@V
CC
=2.5±0.2V
300
1)
@V
CC
=2.0±0.2V
10µA
48-CSP
(6x8 ball area with
0.75mm ball pitch)
1. The parameter is measured with 30pF test load.
48-CSP PIN TOP VIEW
1
A
B
C
D
E
F
G
H
LB
I/O9
I/O10
Vss
2
OE
UB
I/O11
I/O12
I/O13
I/O14
N.C
A8
3
A0
A3
A5
N.C
N.C
A14
A12
A9
4
A1
A4
A6
A7
A16
A15
A13
A10
5
A2
CS
I/O2
I/O4
I/O5
I/O6
WE
A11
6
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Precharge circuit.
N.C
I/O1
I/O3
Vcc
Vss
I/O
1
~I/O
8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A16
Vcc
Vss
Row
select
Memory array
1024 rows
128K×16 columns
Vcc
I/O15
I/O16
N.C
Data
cont
Data
cont
Data
cont
I/O Circuit
Column select
I/O7
I/O
9
~I/O
16
I/O8
N.C
A9 A10 A11 A12 A13 A14A15
Name
CS
OE
WE
Function
Chip Select Input
Output Enable Input
Input
Name
LB
UB
Function
Lower Byte(I/O
1 ~ 8
)
Upper Byte(I/O
9 ~ 16
)
WE
OE
UB
LB
CS
Control
Unit
Write Enable Input
Vcc Power
Vss Ground
N.C. No Connection
A
0
~A
16
Address Inputs
I/O
1
~I/O
16
Data Inputs/Out
p
uts
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
Revision 0.2
August 1998
KM616FS2000Z, KM616FR2000Z Family
PRODUCT LIST
Industrial Temperature Products(-40~85°C)
Part Name
KM616FS2000Z-15L
KM616FR2000Z-30L
48-CSP, 2.5V/3.0V, 150/100ns
48-CSP, 1.8V/2.5V, 300ns
Function
Preliminary
CMOS SRAM
1. The meaning of 2.5V/3.0V, 150/100ns is that the operating V
CC
is ranged from 2.3V(Min) to 3.3V(Max) with speed 150ns @2.5V±0.2 and 100ns
@3.0V±0.3
.
This type of meaning is applied to other notations like the example
.
2. But in case of KM616FR2000Z-30, there is only one speed bin, 300ns though it supports wide range operating V
CC.
FUNCTIONAL DESCRIPTION
CS
H
L
L
L
L
L
L
L
L
LB
X
1)
X
1)
H
L
H
L
L
H
L
UB
X
1)
X
1)
H
H
L
L
H
L
L
WE
X
1)
H
X
1)
H
H
H
L
L
L
OE
X
1)
H
X
1)
L
L
L
X
1)
X
1)
X
1)
I/O
1
~
8
High-Z
High-Z
High-Z
Dout
High-Z
Dout
Din
High-Z
Din
I/O
9
~
16
High-Z
High-Z
High-Z
High-Z
Dout
Dout
High
Din
Din
Mode
Not Select
Output Disable
Output Disable
Read
Read
Read
Write
Write
Write
Active
Active
Power
Standby
Active
1. X means don′t care (Must be in high or low states)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage temperature
Operating Temperature
Soldering temperature and time
Symbol
V
IN
,V
OUT
V
CC
P
D
T
STG
T
A
T
SOLDER
Ratings
-0.2 to 3.6V
-0.2 to 4.0V
1.0
-55 to 150
-40 to 85
260°C, 5sec(Lead Only)
Unit
V
V
W
°C
°C
-
Remark
-
-
-
-
KM616FS2000ZI, KM616FR2000ZI
-
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Revision 0.2
August 1998
KM616FS2000Z, KM616FR2000Z Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Symbol
Vcc
Vss
Product
KM616FS2000Z Family
KM616FR2000Z Family
All Family
KM616FS2000Z Family
Input high voltage
V
IH
KM616FR2000Z Family
Input low voltage
V
IL
All Family
Vcc=3.0±0.2V
Vcc=2.5±0.2V
Vcc=2.5±0.2V
Vcc=2.0±0.2V
1. T
A
=-40 to 85°C, unless otherwise specified
2. Overshoot : Vcc + 1.0V in case of pulse width
≤20ns
3. Undershoot : -1.0V in case of pulse width
≤20ns
4. Overshoot and undershoot are sampled, not 100% tested.
Preliminary
CMOS SRAM
Min
2.3
1.8
0
2.2
2.0
2.0
1.6
-0.2
3)
Typ
2)
2.5/3.0
2.0/2.5
0
-
-
-
-
-
Max
3.3
2.7
0
Vcc+0.2
2)
Vcc+0.2
2)
Vcc+0.2
2)
Vcc+0.2
2)
0.4
Unit
V
V
V
V
V
V
V
V
CAPACITANCE
1)
(f=1MHz, T
A
=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled not, 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
10
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply current
Symbol
I
LI
I
LO
I
CC
V
IN
=Vss to Vcc
CS=V
IH
or WE=V
IL
, V
IO
=Vss to Vcc
I
IO
=0mA, CS=V
IL
, V
IN
=V
IL
or V
IH
, Read
Cycle time=1µs, 100% duty, I
IO
=0mA,
CS≤0.2V, V
IN
≤0.2V
or V
IN
≥V
CC
-0.2V
Cycle time=Min, 100% duty,
I
IO
=0mA, CS=V
IL
,
V
IN
=V
IL
or V
IH
2.1mA at Vcc=3.0V
Output low voltage
V
OL
I
OL
0.5mA at Vcc=2.5V
0.33mA at Vcc=2.0V
-1.0mA at Vcc=3.0V
Output high voltage
V
OH
I
OH
-0.5mA at Vcc=2.5V
-0.44mA at Vcc=2.0V
Standby Current(TTL)
Standby Current (CMOS)
I
SB
I
SB1
CS=V
IH
, Other inputs=V
IL
or V
IH
CS≥Vcc-0.2V, Other inputs=0~Vcc
Read
Write
Test Conditions
Min
-1
-1
-
-
I
CC1
Average operating current
I
CC2
-
-
-
-
-
-
-
-
2.4
2.0
1.6
-
-
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
Max
1
1
10
25
10
25
80
50
25
0.4
0.4
0.4
-
-
-
0.3
10
1)
mA
µA
V
V
mA
mA
Unit
µA
µA
mA
Vcc=3.3V@100ns
Vcc=2.7V@150ns
Vcc=2.2V@300ns
1. Super low power product=2µA with special handling.
Revision 0.2
August 1998
KM616FS2000Z, KM616FR2000Z Family
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Input/Output Reference)
Input pulse level : 0.4 to 2.2V to Vcc=3.0/2.5V
0.4 to 1.8V to Vcc=2.0V
Input rising and faling time : 5ns
Input and output reference voltage :1.5V to Vcc=3.0V,
1.1V to Vcc=2.5v,
0.9V to Vcc=2.0V
Outpuy load(see right) : C
L
=30pF/100pF
V
TM
3)
R
1
2)
Preliminary
CMOS SRAM
C
L
1)
R
2
3)
1. Including scope and jig capacitance
2 .R
1
=3070Ω
,
R
2
=3150Ω
3. V
TM
=2.8V for Vcc = 3.0V
2.3V for Vcc = 2.5V
1.8V for Vcc = 2.0V
AC CHARACTERISTICS
(T
A
=-40 to 85°C, KM616FS2000 Family:Vcc=2.3~3.3V, KM616FR2000 Family:Vcc=1.8~2.7V)
Speed Bins
Parameter List
Symbol
70ns
85ns
100ns
120ns
150ns
300ns
Units
Min Max Min Max Min Max Min Max Min Max Min Max
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Read
UB, LB Access Time
Chip select to low-Z output
OE & LB, UB to low-Z output
Chip disable to high-Z output
OE & LB, UB disable to high-Z
Output hold from address
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write UB, LB Valid to End of Write
Write recovery
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
t
RC
t
AA
t
CO1
t
OE
t
BA
t
LZ
t
OLZ,
t
BLZ
t
HZ
t
OHZ,
t
BHZ
t
OH
t
WC
t
CW
t
AS
t
AW
t
WP
t
BW
t
WR
t
WHZ
t
DW
t
DH
t
OW
70
-
-
-
-
10
5
0
0
10
70
65
0
65
55
65
0
0
30
0
5
-
70
70
35
35
-
-
25
25
-
-
-
-
-
-
-
-
25
-
-
-
85
-
-
-
-
10
5
0
0
15
85
70
0
70
60
70
0
0
35
0
5
-
85
85
45
45
-
-
25
25
-
-
-
-
-
-
-
-
25
-
-
-
100
-
-
-
-
10
5
0
0
15
100
80
0
80
70
80
0
0
40
0
5
-
100
100
50
50
-
-
30
30
-
-
-
-
-
-
-
-
30
-
-
-
120
-
-
-
-
20
20
0
0
15
120
100
0
100
80
100
0
0
50
0
5
-
120
120
60
60
-
-
35
35
-
-
-
-
-
-
-
-
35
-
-
-
150
-
-
-
-
20
20
0
0
15
150
120
0
120
100
120
0
0
60
0
5
-
150
150
75
75
-
-
40
40
-
-
-
-
-
-
-
-
40
-
-
-
300
-
-
-
-
50
30
0
0
30
300
300
0
300
200
300
0
0
120
0
20
-
300
300
150
150
-
-
60
60
-
-
-
-
-
-
-
-
60
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Symbol
V
DR
I
DR
t
SDR
t
RDR
Test Condition
CS≥Vcc-0.2V
Vcc=3.0V CS≥Vcc-0.2V
See data retention waveform
Min
1.5
-
0
t
RC
Typ
-
0.1
-
-
Max
3.6
5
-
-
Unit
V
µA
ns
Revision 0.2
August 1998
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
