Operating Temperature Range ..........................-40ºC to +125ºC
Junction Temperature ...................................................... +150ºC
Storage Temperature Range .............................-65ºC to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Soldering Temperature (reflow) .......................................+260°C
Note 1:
An external pFET or diode is required to achieve negative input protection.
Note 2:
DC current-limited by R
SETI
, as well as by thermal design.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
(Note 3)
TQFN
Junction-to-Ambient Thermal Resistance (θ
JA
)...........29°C/W
Junction-to-Case Thermal Resistance (θ
JC
) .................2°C/W
Note 3:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
PARAMETER
POWER SUPPLY
IN Voltage Range
Shutdown IN Current
Supply Current
Shutdown OUT Current
UVLO, OVLO
Internal UVLO Trip Level
UVLO Hysteresis
Internal OVLO Trip Level
OVLO Hysteresis
External UVLO Adjustment
Range (Note 5)
External UVLO Select Voltage
External UVLO Leakage
Current
External OVLO Adjustment
Range (Note 5)
External OVLO Select Voltage
(V
IN
= 5.5V to 58V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 12V, T
A
= +25°C) (Note 4)
SYMBOL
V
IN
I
SHDN
I
IN
I
OFF
V
EN
= 0V, V
HVEN
= 5V, V
IN
< 24V
V
EN
= 0V, V
HVEN
= 5V
V
IN
= V
OUT
= 24V, V
HVEN
= 0V
V
EN
= 0V, V
HVEN
= 5V
V
IN
falling, UVLO trip point
V
IN
rising
% of typical UVLO
V
OVLO
V
IN
falling
V
IN
rising, OVLO trip point
% of typical OVLO
5.5
V
UVLO_SEL
I
UVLO_LEAK
0.15
-250
6
V
OVLO_SEL
0.15
0.38
0.38
33
34.5
11.5
11.9
CONDITIONS
MIN
5.5
5.25
5.25
1.4
50
12
12.4
3
35
36
3
24
0.5
+250
40
0.5
36.4
37.4
TYP
MAX
58
8
14
1.8
100
12.5
13
UNITS
V
µA
mA
µA
V
UVLO
V
%
V
%
V
V
nA
V
V
www.maximintegrated.com
Maxim Integrated
│
2
MAX14691–MAX14693
High-Accuracy, Adjustable Power Limiter
Electrical Characteristics (continued)
PARAMETER
External OVLO Leakage
Current
External UVLO/OVLO Set
Voltage
Undervoltage Trip Level on OUT
GP
Gate Clamp Voltage
Gate Active Pullup
Gate Active Pulldown
INTERNAL FETs
Internal FETs On-Resistance
Current-Limit Adjustment Range
Current-Limit Accuracy
FLAG
Assertion Drop Voltage
Threshold
Reverse Current-Blocking
Threshold
Reverse Current-Blocking
Response Time
Reverse-Blocking Supply
Current
HVEN
Threshold Voltage
HVEN
Threshold Hysteresis
HVEN
Input Leakage Current
EN, RIPEN, CLTS1, CLTS2
Input Logic-High
EN, RIPEN, CLTS1, CLTS2
Input Logic-Low
EN, RIPEN Input Leakage
Current
CLTS_ Leakage Current
LOGIC OUTPUT (FLAG)
Logic-Low Voltage
Input Leakage Current
I
HVEN_LEAK
V
IH
V
IL
I
RIPEN_LEAK
I
EN_LEAK
,
R
ON
I
LIM
I
LIM_ACC
V
FA
V
RIB
t
RIB
I
RBS
V
GP
SYMBOL
I
OVLO_LEAK
V
SET
V
OVLO_OUT
(V
IN
= 5.5V to 58V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 12V, T
A
= +25°C) (Note 4)
CONDITIONS
MIN
-250
1.18
V
OUT
falling, UVLO trip point
V
OUT
rising
11.5
11.9
10
V
EN
= 5V
I
LOAD
= 100mA, V
IN
≥ 10V,
T
A
= +25ºC
0.6
1A ≤ I
LIM
≤ 6A (T
A
= +25°C)
0.6A ≤ I
LIM
≤ 6A
Increase in (V
IN
- V
OUT
) drop until
FLAG
asserts, V
IN
= 24V
V
IN
- V
OUT
0
-10
-15
490
-5
11
V
OUT
= 24V
2300
3800
-10
1.22
12
12.4
16.1
25
105
TYP
MAX
+250
1.27
12.5
13
20
UNITS
nA
V
V
V
Ω
µA
31
42
6
+10
+15
mΩ
A
%
mV
mV
µs
µA
LOGIC INPUT (HVEN, CLTS1, CLTS2, EN, RIPEN)
V
HVEN
_TH
V
HVEN
= 58V
1.4
0.4
V
EN
, V
RIPEN
= 0V, 5V
CLTS_ = GND
I
SINK
= 1mA
V
IN
= 5.5V,
FLAG
deasserted
-1
25
0.4
1
+1
1
2
5
42
66
3.1
V
%
µA
V
V
µA
µA
V
µA
www.maximintegrated.com
Maxim Integrated
│
3
MAX14691–MAX14693
High-Accuracy, Adjustable Power Limiter
Electrical Characteristics (continued)
PARAMETER
SETI
RSETI x ILIM
V
RI
SYMBOL
(V
IN
= 5.5V to 58V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
IN
= 12V, T
A
= +25°C) (Note 4)
CONDITIONS
See the
Setting the Current-Limit
Threshold
section
MIN
TYP
1.5
MAX
UNITS
V
Current Mirror Output Ratio
C
IRATIO
25000
DYNAMIC PERFORMANCE (Note 6)
Switch Turn-On Time
OVP Switch Response Time
Overcurrent Switch Response
Time
Startup Timeout
Startup Initial Time
IN Debounce Time
Blanking Time
Autoretry Time
THERMAL PROTECTION
Thermal Foldback
Thermal Shutdown
Thermal Shutdown Hysteresis
TJ_FB
TJ_MAX
150
165
10
ºC
ºC
ºC
t
ON
t
OVP_RES
t
OCP_RES
t
STO
t
STI
t
DEB
t
BLANK
t
RETRY
I
LIM
= 4A
Initial start current-limit foldback
timeout (Figure 1)
Current is continuously limited to
1x/1.5x/2x in this interval (Figure 1)
Interval between V
IN
> V
UVLO
and
V
OUT
= 10% of V
IN
(Figure 2)
(Figures 3 and 4)
(Figure 3, Note 7)
1090
21.8
1
21.8
554
V
IN
= 24V, switch OFF to ON, R
LOAD
= 240Ω, I
LIM
= 1A, C
OUT
= 4.7µF,
V
OUT
from 20% to 80% of V
IN
68
3
3
1200
24
1.5
24
720
1320
26.4
2.1
26.4
792
µs
µs
µs
ms
ms
ms
ms
ms
Note 4:
All devices are 100% production-tested at T
A
= +25ºC. Specifications over the operating temperature range are guaranteed
by design.
Note 5:
Not production-tested, user-adjustable. See the
Overvoltage Lockout (OVLO)
and
Undervoltage Lockout (UVLO)
sections.
Note 6:
All timing is measured using 20% and 80% levels, unless otherwise specified.
Note 7:
The autoretry time-to-blanking time ratio is fixed and is equal to 30.
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