OM6800
VGA image sensor module
Rev. 01 — 22 November 2002
Preliminary data
1. General description
The OM6800 is a fixed-focus, highly integrated 1/4” CMOS colour imager module that
supports up to VGA resolution formats in a small package including a focused optical
system. It uses Philips SeeMOS™ technology for high sensitivity and low noise. The
sensor is digitally programmable via an I
2
C-bus serial interface and is equipped with
an integrated Programmable Gain Amplifier (PGA) and a 9-bit Analog-to-Digital
Converter (ADC). An embedded flexible timing generator enables easy matching to
various digital signal processing chips.
The module can operate as a master or as a slave. In the master mode, line and
frame synchronization output signals are generated by the module. In the slave
mode, the same pins are used as inputs for horizontal and vertical synchronization
signals.
2. Features
s
Compact size sensor module with integrated two-element lens system
s
VGA resolution; 640 H
×
480 V active pixels
s
Supports (amongst others) Video Graphics Array (VGA), Common Interchange
Format (CIF), Quarter Common Interchange Format (QCIF), Quarter Video
Graphics Array (QVGA) and Quarter-Quarter Video Graphics Array (QQVGA)
resolution formats
s
Up to 30 frames/s VGA at 12 MHz pixel frequency
s
Pixel frequency equals clock frequency (range up to 13 MHz)
s
4.48 mm (1/4”) active image diagonal
s
Active 5.6
×
5.6
µm
pixels
s
Highly sensitive; low noise SeeMOS™ technology
s
Low fixed pattern noise (adjustment free)
s
Bayer-RGB colour filter array with micro lenses
s
Anti-blooming
s
Integrated on-chip timing
s
Programmable via the I
2
C-bus serial interface
s
Electronic shutter control
s
24 dB Programmable Gain Amplifier (PGA) (in steps of 0.094 dB)
s
9-bit ADC digital output
s
Analog output available (negative video)
s
Frame synchronous gain/exposure change-over
Philips Semiconductors
OM6800
VGA image sensor module
s
User programmable: window of interest, digital black level, scan directions,
system blanking, exposure time (multiple field times, line based and sub-line
based) and output synchronization signals
s
Low power consumption; 60 mW at 30 frames/s VGA
s
Power-down mode accessible via the I
2
C-bus, supply current <5
µA
s
Single 2.6 to 3.6 V supply voltage range
s
Programmable master or slave operation
s
Real-time white pixel blemish correction
s
H/V synchronization; master or slave
s
Programmable read-out direction and output pins test patterns.
3. Applications
s
s
s
s
s
Mobile phone
Personal Digital Assistant (PDA)
PC camera
Automotive
Security.
4. Quick reference data
Table 1:
Symbol
L
W
H
DFOV
V
DD
P
S/N
f
pix
FR
[1]
Quick reference data
Parameter
module length
module width
module height
diagonal field of view
supply voltage
power consumption
signal-to-noise ratio
pixel frequency
f
pix
= 12 MHz
frame rate
[1]
for
640 (H)
×
480 (V) window
V
DD
= 2.8 V
100 lux;
T
int
= 1/30 s
Conditions
Min
−
−
−
−
2.6
−
−
0.1
−
Typ
10.66
10.66
7.75
52
2.8
60
38
12
30
Max
−
−
8.00
−
3.6
−
−
13
−
Unit
mm
mm
mm
°
V
mW
dB
MHz
fr/s
Frame rate depends on number of clocks/line and lines/frame
5. Ordering information
Table 2:
Ordering information
Package
Name
OM6800WC
CWQCCN32L
Description
Version
ceramic window quad chip carrier; no leads; 32 terminals; with lens; SOT730-1
body 10.7
×
10.7
×
8 mm
Type number
9397 750 09619
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Preliminary data
Rev. 01 — 22 November 2002
2 of 38
Philips Semiconductors
OM6800
VGA image sensor module
6. Block diagram
VDDD
13
CLKIN
14
CLOCK
COLUMN SELECT
POWER
DOWN
power
control
IMAGE SECTION
656 (H)
×
494 (V)
active pixels
22
EXTBIAS CPDECAP
VDDA
19
VDDO
21
from
clock circuit
15
CLKOUT
26
23
SCLK
32
OM6800
SDATA
VD
16
ROW SELECT
31
BUFF
OUTB
HD
17
INEXSY
28
COLUMN SENSOR AND
SAMPLE-AND-HOLD
CIRCUIT
KP
30
RESET
29
READ
AMP
PGA
LEVEL
SHIFT
black
control
ADC
DIGITAL CONTROL INTERFACE
27
1,12
DGND
2
n.c.
18
AGND
24
TEST1
25
TEST2
20
OGND
3 to
11
D0 to D8
TEST3
MGW851
Fig 1. Block diagram.
9397 750 09619
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Preliminary data
Rev. 01 — 22 November 2002
3 of 38
Philips Semiconductors
OM6800
VGA image sensor module
7. Pinning information
7.1 Pinning
SDATA
RESET
DGND
SCLK
n.c.
KP
D0
3
INEXSY
TEST3
EXTBIAS
TEST2
TEST1
CPDECAP
OUTB
VDDO
D1
4
29
28
27
26
25
24
23
22
21
20
OGND
CLKOUT
AGND
CLKIN
VDDD
VDDA
HD
VD
30
19
31
18
OM6800
32
17
1
16
2
15
5
6
7
8
9
10
11
12
14
13
D2
D3
D4
D5
D6
D7
D8
DGND
MBL586
Fig 2. Pin configuration (bottom view).
7.2 Pin description
Table 3:
Symbol
DGND
n.c.
D0
D1
D2
D3
D4
D5
D6
D7
D8
DGND
V
DDD
CLKIN
CLKOUT
VD
HD
AGND
V
DDA
9397 750 09619
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
O
O
O
O
O
O
O
O
O
supply
supply
I
O
I/O
I/O
supply
supply
Type
supply
Description
digital ground
to be connected to DGND
digital data output bit 0 (LSB)
digital data output bit 1
digital data output bit 2
digital data output bit 3
digital data output bit 4
digital data output bit 5
digital data output bit 6
digital data output bit 7
digital data output bit 8 (MSB)
digital ground
digital supply voltage
digital clock input
to be used in QVGA mode
digital vertical drive
digital horizontal drive
analog ground
analog supply voltage
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Preliminary data
Rev. 01 — 22 November 2002
4 of 38
Philips Semiconductors
OM6800
VGA image sensor module
Pin description
…continued
Pin
20
21
22
23
24
25
26
27
28
29
30
31
32
Type
supply
supply
O
I/O
I
I/O
I ana
I
I
I
O
I
2
C-bus
I
2
C-bus
Description
output buffer ground
output buffer supply voltage
analog buffer output, do not connect
internal reference voltage (10 nF capacitor
connected to AGND)
to be connected to AGND
to be connected to AGND
internal reference voltage (10 nF capacitor
connected to V
DDA
)
to be connected to DGND
internal/external sync timing selection for internal
timing: (internal pull-down)
reset input (internal pull-down)
do not connect
I
2
C-bus data input/output
I
2
C-bus clock input
Table 3:
Symbol
OGND
V
DDO
OUTB
CPDECAP
TEST1
TEST2
EXTBIAS
TEST3
INEXSY
RESET
KP
SDATA
SCLK
8. Functional description
8.1 Architecture of the OM6800
8.1.1 Image section
The image section consists of a pixel array, vertical and horizontal selection circuitry,
an array of column amplifiers and a read amplifier. The pixel array contains
704 (H)
×
512 (V) pixels. The optical active pixels are covered by red, green and blue
colour filters arranged in a RGB-bayer structure. A micro-lens is placed on top of the
colour filters to increase the effective fill factor and consequently to achieve a higher
sensitivity. For black reference purposes a number of rows and columns are shielded
from light. Nine shielded rows are implemented at the top and bottom of the array.
24 black reference columns are available to the left and right. This results in an
optical active array of 656 (H)
×
494 (V) pixels.
The vertical selection circuitry has a double functionality. One is to select the line to
be read, the other is to select the line to reset, to determine the integration time
period. The integration time is determined by a rolling shutter. After a line has been
selected by the vertical selection circuitry and read by the column amplifiers, the
horizontal selection circuitry controls the selection of the pixel data that is to be
processed by the read amplifier.
The read amplifier performs Correlated Double Sampling (CDS) on the pixel data to
suppress Fixed Pattern Noise (FPN).
8.1.2 Programmable gain amplifier
The output signal of the read amplifier is applied to a PGA that has a gain range of
24 dB. The gain of the PGA can be programmed in 255 steps with an accuracy of
0.094 dB/step (typ.).
9397 750 09619
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Preliminary data
Rev. 01 — 22 November 2002
5 of 38
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