www.fairchildsemi.com
AN-6099
New PowerTrench
®
MOSFET with Shielded Gate
Technology Increases System Efficiency and Power
Density in Synchronous Rectification Applications
Abstract
Synchronous rectification in a high-performance converter
design is essential for low-voltage and high-current
applications because significant efficiency and power
density improvements can be achieved by replacing
Schottky rectification with synchronous rectification
MOSFETs. Many critical parameters for synchronous
rectification MOSFETs and even parasitic components in
devices and printed circuit board directly affect the system
efficiency of synchronous rectification. Optimization of the
MOSFETs plays an important role in improving efficiency.
The PowerTrench
®
MOSFET with shielded-gate technology
can dramatically reduce both on-resistance and gate charge,
which are usually in conflict. With soft-body diode
characteristics, the new power MOSFETs reduce voltage
spikes that cause additional losses in the snubber circuits.
For better system efficiency and power density, the
characteristics of new PowerTrench
®
MOSFETs are
introduced and compared to other power MOSFETs
available in the market. The benefits of these MOSFETs are
shown in synchronous rectifier of target application.
enjoyed significant evolution in the last decade, which
enabled new topologies and high power density in power
supplies. The key requirements for synchronous rectification
MOSFETs are:
Low R
SP
Low dynamic parasitic capacitances. This also reduces the
gate drive power since synchronous rectification circuit is
generally operated at high frequency.
Low Q
RR
and C
OSS
reduces reverse current. This becomes
a problem when this topology is operated at high
switching frequency. At high switching frequency, this
current acts as high leakage current.
Low t
RR
, Q
RR
, and less snappy body diode is needed to
avoid momentary shoot-through and reduce loss. Snappy
diode may require a snubber across each MOSFET.
Low Q
gd
/Q
gs
ratio prevents dynamic turn-on.
Np:Ns
L1
Introduction
As our economy moves from paper-based to digital
information management; data centers for data processing,
storage, and networking play an important role in many
industries. However, data centers are becoming increasingly
expensive to power and cool. Higher system efficiency and
power density in modern data and telecommunication power
systems are the core focus since making a small high-
efficiency power system means saving space and energy
bills. From a topology point of view, synchronous
rectification that converts the AC voltage from the
transformer back to DC becomes an essential building block
for the secondary side of the switched-mode power supply
(SMPS) in many applications. This solution offers improved
efficiency for these conversion stages with both lower
conduction loss and switching losses.
[1]-[3]
For this reason,
synchronous rectification is very popular in low-voltage and
high-current applications, such as server power supplies or
telecom rectifiers. As shown in Figure 1, it replaces
Schottky rectifiers, allowing lower voltage drop. From a
device point of view, the power MOSFET transistor has
© 2013 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 3/12/13
D1
C
o
R
LOAD
D2
L2
(a) Diode Rectification
Np:Ns
L1
Q1
C
o
R
LOAD
Q2
L2
(b) Synchronous Rectification
Figure 1. Diode Rectification and Synchronous
Rectification
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AN-6099
APPLICATION NOTE
The low- and medium-voltage MOSFETs developed rapidly
to accomplish significant performance improvements with
trench gate technology after the introduction of planar
technology in early 1970s. The trench gate MOSFETs are
now the preferred power devices for medium- to low-
voltage power applications. These MOSFETs implement a
gate structure embedded into a trench region carefully
etched into the device structure. The specific on-resistance
improves about 30% with this new technology, thanks to the
ability to increase channel density and eliminate the JFET
resistance component. Power losses in synchronous
rectification can be lowered when the product of MOSFET
on resistance and drain current is less than the diode
forward-voltage drop. However, low on-resistance is not the
only requirement for the power switches in terms of
synchronous rectification. They should have small gate
charge to reduce driving losses. Soft-body diode reverse-
recovery characteristics can reduce snubber losses by
damping the peak level of voltage spikes. There are also
switching losses due to the output charge, Q
OSS
, and reverse-
recovery charge, Q
rr
. Therefore, critical parameters for low-
and medium-voltage MOSFETs; such as R
DS(ON)
, Q
G
, Q
OSS
,
Q
rr
, and reverse-recovery characteristics; directly affect to
system efficiency of synchronous rectification. Fairchild
designed a new highly optimized power MOSFET, called
PowerTrench
®
MOSFET, with shielded gate technology for
synchronous rectification with deep analysis of power losses
in synchronous rectification of server power supplies or
telecom rectifiers.
dramatically reduce the channel resistance (R
channel
) and
JFET resistance (R
JFET
) that are the major contributors to
on-resistance of low-voltage MOSFETs (BV
DSS
< 200 V),
as shown in Figure 2. With compelling advantage of the
trench structure in the ability to reduce R
DS(ON)
by providing
the shortest possible current path (vertical) from drain to
source, it is possible to increase cell density without any
JFET pinch-off effect. The percentage of resistance
associated with each region varies dramatically, depending
on design and BV
DSS
. While R
DS(ON)
is indispensable to the
low conduction losses, consideration must be made for
enhanced FOM, where trade-offs in trench depths and
widths exist to optimize the structure.
Source
Metal
R
metal
Gate
E-field
A
A
P
+
P
N
+
Poly
R
channel
Oxide
BV
R
epi
Drift Region
N- Epi Layer
B
N+ Substrate
R
substrate
Drain
B
Medium Voltage MOSFETs
Technologies
The R
DS(ON)
× Q
G
, Figure Of Merit (FOM) is generally
considered the single most-important indicator of MOSFET
performance in switching mode power supplies. Therefore,
several new technologies have been developed to improve
the R
DS(ON)
× Q
G
FOM. While MOSFET technologies and
cell structure have dramatically changed through the years,
the vertical cell structure of a MOSFET can be classified
into three structure types: planar, trench, or lateral. Among
the three structures, trench-gated MOSFETs have become
the mainstream for high-performance discrete power
MOSFETs with BV
DSS
< 200 V.
Figure 3. Conventional Trench Gate MOSFET
Source
Metal
R
metal
P
+
P
Oxide
N
+
Gate
E-field
A
Poly
Poly
R
channel
BV
Shield
R
epi
N- Epi Layer
R
substrate
N+ Substrate
Drain
Figure 2. Relative Contribution to R
DS(ON)
with Different
Voltage Ratings
Figure 4. The latest trench MOSFET with shielded gate
technology
They are chosen primarily for their particularly low specific
on resistance and capability for excellent R
DS(ON)
× Q
G
FOM
across the BV
DSS
spectrum. The trench gate structure can
© 2013 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 3/12/13
2
Variations to the standard trench cell are often designed
with the intention of preserving low resistance, while
enhancing the FOM. The conventional trench gate structure
of Figure 3 enables lower on resistance by increasing the
www.fairchildsemi.com
AN-6099
APPLICATION NOTE
channel width-to-length ratio. The other concept originally
developed for high-voltage devices, but now being used for
low-voltage devices as well; is the use of charge balance or
super-junction device structures. With the use of the charge
balance approach, two-dimensional charge coupling in the
drift region can be obtained. The latest middle-voltage
power MOSFETs from Fairchild employ this shielded-gate
structure, where the shield electrode is connected to the
source, as shown in Figure 4. The shield electrode, along
with the thicker oxide between electrode and drift region,
provides charge balance for drift region. This enables higher
doping in the drift region, resulting in reduced drift
resistance. The specific resistance of these new medium-
voltage power MOSFETs has been significantly improved
over the previous generation, while improving on the
already superior switching characteristic. Apart from R
DS(ON)
and Q
G
, body diode reverse recovery, internal gate
resistance, and the output charge of the MOSFET (Q
OSS
) are
now becoming more relevant in synchronous rectification.
The importance of these loss components rises at higher
switching frequencies and higher output currents.
Fairchild’s new medium-voltage MOSFETs are being
optimized to minimize the diode reverse recovery as well as
the output capacitance. The latest PowerTrench
®
MOSFET,
FDP045N10A, employs shielded-gate structure that
provides charge balance. By utilizing this advanced
technology, the FOM (Q
G
×R
DS(ON)
)) is 66% and 38% lower
than the previous generation and competitor MOSFETs, as
shown in Figure 5.
presents a resistive V-I characteristic. The forward-voltage
drop of synchronous rectification can be lower than that of a
diode rectifier and, consequently, dramatically reduces the
rectifier conduction loss. Conduction loss can be obtained
through below equation:
P
Con
=I
2RMS
• R
DS(ON)
(1)
For high-voltage MOSFETs, the resistance of packages has
not been a concern. R
DS(ON)
can be achieved at 1~2 m in a
TO-220 standard package, depending on the voltage rating,
by using modern medium voltage MOSFETs technology.
Unlike high-voltage MOSFETs, the package itself
contributes a significant portion of the total resistance for
medium-voltage MOSFETs due to wire bonding, lead, and
source metal. For example, up to around 33% of the R
DS(ON)
is accounted for by the package resistance in a 75 V/2.3
MOSFET, as shown in Figure 8. SO-8 packages were
popular before upgraded power package Power56. Total on
resistance of medium-voltage MOSFET can be dramatically
reduced by using an SMD package, such as Power56. It can
also reduce package inductance that causes undesirable
voltage spikes. It enables use of lower R
DS(ON)
MOSFETs by
replacing lower voltage rating MOSFETs.
Figure 6. Power Losses Analysis in ATX Power Supply
Figure 5. Normalized Figure of Merit (FOM) [R
DS(ON)
*Q
G
]
Power Losses in Synchronous
Rectification
Conduction Loss
Power losses in secondary rectification are very critical,
especially in low-voltage and high-current applications, as
shown in Figure 6. Therefore, secondary-side synchronous
rectification is an excellent solution to improve system
efficiency. As shown in Figure 7, the conduction loss of
diode rectifier contributes significantly to the overall power
loss in a power supply. The rectifier conduction loss is
proportion to the product of its forward-voltage drop, V
F
,
and the forward current, I
F
. Synchronous rectification
© 2013 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 3/12/13
3
Figure 7. Power Losses Comparison between Diode
Rectification and Synchronous Rectification
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AN-6099
V
CC
Driver
V
GS
(Driver)
APPLICATION NOTE
V
DD
V
GS
(DUT)
10V
10V
V
R
G
R
G
DUT
Figure 10. Q
SYNC
Measurement
Figure 8. Relative Contribution to R
DS(ON)
with 75 V
MOSFET and 600 V MOSFET
Gate Driving Loss
Major power losses in power switches are conduction and
switching losses. There are also capacitive losses caused by
output capacitance; off-state losses due to leakage current;
and reverse recovery losses. Driving losses at the gate driver
are related to Q
G
. These losses are often neglected in high-
voltage, high-power applications even though the capacitive
losses can be more than 50% of total power losses in
applications of several Watts. It is important to note that a
faulty device with excessive leakage can lead to thermal
runaway failure, especially at hot ambient temperatures, but
this is a rare occurrence. In low-voltage applications, the
driving losses can consume a large portion of the total
power losses as low-voltage switches have very low
conduction losses compared to high-voltage switches.
During light-load conditions, conduction losses are minimal
and the driving losses are even more important. As new
efficiency guidelines, such as Climate Savers Computing
Initiative, are introduced; the driving losses become critical
for light-load efficiency.
[4]
The driving losses can be
obtained through Equation (2):
P
drive
= Q
g
·V
gs
·
f
s
(2)
The switching frequency and gate drive voltage are design
parameters and the gate charge value is specified in
datasheets. In synchronous rectification, one difference from
a diode rectifier is that the MOSFET is bidirectional device.
Generally, current flows through MOSFET channel from
source to drain during conduction time and flows through
body diode during dead time, as shown in Figure 9. Since
there is body diode turn-on prior to gate turn-on in
synchronous rectification, zero-voltage switching (ZVS) is
possible for the synchronous switch. Since the MOSFET
does soft switching at switch turn-on and turn-off transients,
dV
ds
/dt is zero. Therefore, capacitive current from C
GD
is
also zero. Because of the sequence, the gate charge value in
Equation 2 should be selected carefully. As there is no
voltage across the synchronous switch during turn-on
transient, the “Miller effect” does not occur.
[5]
Therefore, a
resulting gate charge becomes approximately the value of
the gate-drain portion of gate charge, Q
GD
subtracted from
total gate charge, Q
G
. This is a reasonable estimate for the
driving losses; but, in practice, gate charge value in a
synchronous switch varies from Q
G
-Q
GD
estimation because
there is a negative bias between drain and source in
synchronous rectification. However, a positive bias is being
used to measure Q
G
and Q
GD
in the datasheets. Also, the
curve of the Q
SYNC
below the V
th
is similar to the slope
above the V
th
because the drain-source voltage is zero in
both regions during ZVS in synchronous rectification. A
gate charge for synchronous rectification, Q
SYNC
can be
measured using simple circuitry, as shown in Figure 10.
Appropriate driving signals for DUT and driver with a
known value of resistor, Q
SYNC
becomes as Equation 3:
Qsync
½
1
V
R
t
dt
R
G
G
(3)
Soft switching
Q
SYNC
=Q
G
-Q
GD
V
DS
:10V/div
Isd:5A/div
V
GS
(volts)
Plateau
V
gs
:2V/div
1µs/div
Hard Switching
Q
G
=i
G
·t
Q
G
=C·V
GS
Qgs
Body Diode
SR MOSFET
Body Diode
Qgd
Figure 9. Power MOSFET in Synchronous Rectification
Q
SYNC
[nC]
Q
G
[nC]
Figure 11. Definition of Q
SYNC
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4
© 2013 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 3/12/13
AN-6099
APPLICATION NOTE
Figure 12. Gate-Source Capacitances Comparisons
This gives more accurate estimation of the gate driving
power losses. A device with smaller Q
SYNC
shows better
performance in synchronous rectification. As shown in
Figure 11, there is no plateau region on gate-source voltage
of power MOSFFET for synchronous rectification. In
synchronous rectification, C
GS
(C
ISS
-C
rss
) is a more critical
factor to reduce Q
SYNC
. As shown in Figure 12 and Figure
13, C
GS
and Q
G
of the FDP045N10A is greatly reduced
compared to FDP047N10 and a 100 V / 4.5 mΩ competitor.
As shown in Table 1, Q
SYNC
of the FDP045N10A is reduced
by 64% and 34%, compared to the FDP047N10 and the
same 100 V / 4.5 mΩ competitor. Figure 14 shows a
calculated loss ratio between driving loss and conduction
loss in a 24 V synchronous rectification stage with gate
driving voltage of 10 V and switching frequency of
100 kHz. When there are two synchronous switches, the
gate driving losses of the FDP047N10 is three times higher
than the conduction losses at 10% load condition. This
graph indicates that the FDP045N10A dramatically reduces
driving loss at light-load condition due to small Q
SYNC
.
Table 1.
Critical Specification Comparison of DUTs
DUTs
100 V / 4.5 m, Latest Shielded-Gate
Trench MOSFET FDP045N10A
100 V / 4.7 m, Conventional Trench
Gate MOSFET FDP047N10
100 V/4.5 m Competitor
Figure 13. Gate Charge Comparisons
6
Loss ratio [ Driving loss / Conduction loss ]
5
FDP045N10A
FDP047N10
100V 4.5mOhm, Competitor
4
3
2
1
0
20
40
60
80
100
Output Power [%]
Figure 14. Comparisons of Loss Ratio [Driving Loss /
Conduction Loss] According to Output Load
Q
SYNC
(nC)
49.5
137.7
75.2
Q
G
(nC)
63.0
182.7
95.9
Q
GS
(nC)
18.9
67.5
20.7
Q
GD
(nC)
13.5
45.0
20.3
Q
rr
(nC)
295.5
290.1
379.7
I
rrm
(A) Softness
12.1
12.9
12.8
0.45
0.31
0.40
Body Diode Losses
During the dead time, body diode conduction occurs. Body
diode conduction leads to substantial power loss because of
the high voltage drop across the P-N junction compared to
the voltage drop caused by the MOSFET channel. This
MOSFET loss due to body diode conduction during dead
time has a degrading effect on overall efficiency, especially
at low voltages and high frequencies. Therefore, the body
diode conduction losses can be minimized through proper
dead-time management. Gate drivers tend to have effective
© 2013 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 3/12/13
5
minimum dead-time. The lower threshold voltage, V
th
, of
the power MOSFET leads to a shorter delay and switching
times to allow for much tighter dead-time control, beneficial
in reducing body diode conduction loss in synchronous
rectification. A lower threshold voltage helps in turning on
the MOSFET by reducing the rise time, which can be
obtained through below equation:
t
r
= R
G
·
C
iss
/ (V
GS
- V
th
)
(4)
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