'Composite Sync or Composite B1ankina control signaIa reset input rqisters. Composite Sync or Compoaite BIanItiq should DOt be operated simuitaDeOUlly !rith Refermce White.
'Power supply must have I... than SmV p-p ripple.
-.
'Operating lemperamn:
SS'C 10 + 12S'C on "SD" unita.
"Maimw" junction lemperamn:
=ISO'C.
::CaIculaledfor HDG~05SDB
usins MIL HNBK.217; Ground Fixed; +2S'C Ambient.
-s.. Sec:tioo13 for pac.
outline information.
-
.
SPlCificslion
same u
HDG-0405.
.. SpeciflCltionSatDeu HDG-040SBDlBW/SD.
\pecificationasubjecl 10 cbanse without notice.
SPEe
IFieATI NS
ftPaI
0
Parameter
RESOLUTION
-LEAST SIGNIFICANT
WEIGHT
'
Voltage (adjustable)
Current (adjustable)
ACCURACY'
(GS
@
+ 2ft willi
ominal
aw8I'
~
n
p
"'~
4
~
6
unless
aIheI
wise noIIId)
'-
-
IUT (LSB)
_'faits
... - -.Bits
HJ>G..4I8O5~BDI
BWISD
8
4
~BD/~BDI
BWISD
6
BWISD
8
mV
- fLA-" _H' . ---
...
."
40
1067
10
267
2.5
67
40
1067
10
267
2.5
67
=
Gray
Sale;
FS.= Full-Scale)
Linearity
Differential
Zero Offset
Linearity
(Initial)
.,.
:!:%GS
.':!:%GS,max
mV,max
3.2
..~.2-
-11.9 .
- --. --Gumnteed
0.8
0.8
*
*
*
*
0.2
0.2
*
*
*
*
*
3.2
3.2
*
*
15(30)
*
*
0.8
0.8
*
*
**
*
*
0.2
0.2
.*
*
**
*
*
Voltage
Monotonicity
TEMPERATURE
Linearity
Gain
Zero Offset
COEFFICIENTS
ppmI"C(maX)- -"2()(35)
ppmI"C (max)SO
(125)
"ppmI"C{mu)
... -10(15)
*
OBS
DYNAMIC CHARACTERlSTlCS-
.
GRAY SCALE OUTPUT
I
-SettlingTime.
-(OV-toFSGSdwIge)
Voltage
.
Update Rate2
SlewRate
RiseTime
Glitch Energy3
DATA
INPUTS
. %GS;
6.4
4(5)
150(125)
200
2
SO
1.6
6(8)
*
*
*
*
*
*
0.4
8 (10)
*
*
*
*
*
*
6.4
5(6)
*
*
*
80
*
*
1.6
7(9)
*
*
*
**
*
*
0.4
9(11)
*
*
*
**
*
*
-. -
III (m)
MHz(min)
V/fLS
D6
I
,
. pV-s
DIGITAL
Logic Compatibility
Coding
"I"
"0"
Logic Levels
V (minimax)
. . V (minimax)
Loading (each bit)
STROBE INPUT
Logic Compatibility
Logic Levels
"I"
"0"
V (minimax)
'v (minimax)
Loading
Setup Time (Data)
Hold Time (Data)
Propagation Delay
10% BRIGHT, REFERENCE WHITE,
COMPOSITE SYNC, AND
COMPOSITE BLANKING INPUTS
Logic Compatibility
Logic Levels
OLE
TE
EeL
Complementary
Binary
(CBN)
-0.9(-1.1/-0.6)
-1.7(-2.0/-1.5)
5pFand 50k!l to -5.2V
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
ECL
*
-0.9(-1.1/-0.6)
*
0";1.7(-2.0/-1.5)
*
5OpFand 5k!l to ""-5.2V *
2.5
1.5 -
3(4)
*
*
*
*
*
os, min
os, min
os (max)
*
*
*
*
*
*
5pF and 50k!l
to
- 5.2V
*
*
**
*
*
**
*
*
*
*
*
*
ECL
V (minimax)
V (minimax)
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
"I"
"0"
Loading
SPEED PERFORMANCE-
CONTROL INPUTS
Settling Time to 10% of Final Value for:
-0.9(-1.1/-0.6)
-1.7(-2.0/-1.5)
5pFand 50k!l to -5.2V
-
10%Bright
Reference White
Composite Sync
Composite Blanking
SETUP CONTROL
Ground
Open
os(max)
ns (max)
os (max)
ns(max)
mV (IRE Units)
mV (IRE Units)
mV(IREUnits)
8 (10)
8(10)
8 (10)
8 (10)
0(0)
71(10)
142(20)
Oto -16
Oto -600
-1.1to+1.1
75
(7ln9)
*
*
*
*
*
*
*
Oto -16.8
Ora -630
*
*
*
*
*
*
*
*
*
Oto -17
Oto -637.5
*
*
*
*
*
*
*
*
*
Oto -16
Oto-600
-1.2to+0.l
*
*
*
*
*
*
*
*
Oto -16.8
Oto -630
**
*
*
*
*
*
*
*
*
-
--
---
-5.2V
ANALOG OUTPUT
GS Current
GS Voltage 4
Compliance
Intema1 Impedance
mA(:tl%)
mV
V
O(minlmax)
Oto -17
Oto -637.5
**
*
2-330
DIGITAL-TO-ANALOG CONVERTERS
---
~
PIN DESIGNATIONS
Pin Function
Pin
Function
GLITCH
ADJUST
12 GROUND.
13
11 BIT8(LSB)
14
GROUND
15
GROUND
10'
BIT7
GROUND
9
16
BIT6
17
GROUND
8 BIT
5
18
ANALOG OUTPUT
7 STROBE
6 BIT
19
COMPOSITE SYNC
4
3
.20 SETUP
5 BIT
4 BIT
2
21
10% BRIGHT
22
COMPOSITE SLANKING
3
BIT 1 (MSB)
2
REFERENE WHITE
-5.2V
23
1 GROUND
24
-5.2V
NOTES:
For HDG-o&05
units.
Pin 9is LSB;
Pins 10
and 11 are present but'not used.
For HDG-0405
.
Pins
8. 9. 10.and 11are
present but not used. Connect Pins 1. 12, and
,~ 17 together land to low-impedance
ground
.plane as close to case as possible.
units.
Pin 6 is LSB;
OBS
X
X
X
X
X
X
NOTES
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
USING HDG-SERIES UNIT FOR RASTER SCAN
Refer to the block diagram of the HDG-Series
D/A
Converter
and the idealized composite output waveform. .
The djgital input bits represent the GrayScale values (the discrete
levels between Reference Black and Reference White) in a com-
posite video signal. For Hoo-0405 units, there are 16 (24)of
these levels; for the HDG-0605, 64 (26)levels; and for the Hoo-
OS05,256 (28)levels.
The input bits are applied to Pins ~ (only, for the HDG-040S),
and Pins S'and 9 for the HDG-0605; or Pins S-II for the
HDG-O805.
DIGITAL INPUTS VS. ANALOG OUTPUT
BIT BIT BIT BIT BIT BIT BIT BIT
1
5
6
7
2
3
4
8
1
1
1
1
1
1
1
1
1
1
.
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
10010
OLE
TE
BRIGHT
0
1
0
0
1
0
1
0
0
0
0
0
0
1
1
1
REF.
WIDTE
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
BLANK-
ING
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
-71
.-637.52
-70S.5mV3
-779.5mV4
-922.5mV2
-993.5mV3
-I064.5mV4
-993.5mV2
-1064.5mV3
-1l35.5mV4
The output analog signal (at Pin IS) will be a function of these
djgital inputs. The output will also be affected by the ECL
levels at the control inputs of 10%Bright, Reference White,
Composite Sync, and Composite Blanking; and the level of the
control signal (expressed in terms of IRE units) at the Setup
input.
The total effect of these combined signals can be illustrated in a
truth table format if arbitrary values are assigned for Gray scale
inputs, and various combinations of control inputs are 1idected.
Refer to Table I.
COMPo ANALOG OUTPUT IN mVI
SYNC
(HDG-0805BOIBWISO)
1
0
1
-71
,....320
1
1
-637.5
-70S.5
1
lValua are for Gray Sc:ale
output oU-bit
DIA's.
To determiDe fu1l-ac:a1e.Gray
Scaleoutput for 4-bit unita,aubtract total value of 4 LSS's (37.SmV) from 8-bit
outputabown. Todetermi.neoutputof6-bitunita,aubtr1lCt total value of2 LSS's(7.SmV) from 8-bitoutpuubown.
2Setup(Pin20)pouDded. (OlREunita)
JSetup(Pin20)open. (lOlREunitl)
~p(Pin20)to
-S.2V(20IREunitl)
Actua18D8logoutput value of 637.SmV is different from ideal value of 643mV because ofLSB value used in calibration.
-
-
Table I. Digitsllnputs vs. Analog Output
2-332
DIGITAL-TO-ANALOG
CONVERTERS
[
~s the footnote to the table points out, the actual full-scale
(- 637.5mV) output of the HDG units is different from the
ideal
-
643mV output shown in the composite waveform.
The tWoare different because Analog Devices uses 2.5mV for
weighting LSBduringcalibrationof the converter.The
the
-5.2V
270
STROBE
INPUT
160
-
OUTPUT
.
D/A
HDG-080S
CONVERTER
-S.2V
disparitydoes not cause any problems in using the device, since
bOththe ideal value and the actual value are well within the
tolerancesof the output and the RS-343 standard.
Referringagain to the block diagram, the Strobe input applied
to the HDG D/A clocks the input registers when the strobe
signalmakes the transition from a logic "0" to a logic "1". The
purposeof the registers is to remove time skew from the digital
input bits and minimi7,cpertUrbations or "glitches" in the analog
output signal.
Alogic "0" applied to either the Composite Sync or Composite
Blankinginput (on the HDG-OSOS)esets the input registers to
r
00000 000. The analog output at Pin 18 will be -922.5mV
(- 637.SmV plus - 285mV) if the Composite Sync input is
operated;this is not affected by the value of IRE units at the
.
SetUpinput.
~ logic "0" signal applied to the Reference White input sets the
input registers, thereby overriding the video input word. When
this occurs, the analog output of the converter goes to OV or. to
71mV, depending upon whether or not the 100/0Bright signal
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
