www.fairchildsemi.com
Application Note AN6016
LCD Backlight Inverter Drive IC (FAN7311)
1. Description
Design goals for a Cold Cathode Fluorescent Lamp (CCFL)
inverter for use in a notebook computer or other portable
applications include small size, high efficiency, and low cost.
The FAN7311 provides the necessary circuit blocks to
implement a highly efficient CCFL backlight power supply
in 20-SSOP and 20-SOIC packages. The FAN7311 typically
consumes less than 4mA of operating current, improving
overall system efficiency. External parts count is minimized
and system cost is reduced by the integration of features
including; feedback-controlled Pulse Width Modulation
tm
(PWM) driver stage, soft start, open lamp regulation, and
Under Voltage Lockout protection (UVLO).
The FAN7311
includes an internal shunt regulator that allows operation
with an input voltage from 5V to 25.5V. It supports analog
and burst dimming modes of operation. The FAN7311 pro-
vides open lamp regulation and protection. Open lamp regu-
lation protects the transformer from over-voltage during start
up or when an open lamp occurs. The transformer voltage is
regulated by reducing duty cycle when an over-voltage is
detected. Open lamp protection can be used to shut down an
IC when an open lamp condition continues longer than a
specified time.
F1
FUSE
CN5
1
2
3
4
5
6
7
8
9
10
12505WR-10
0
DIM (0~3.3V)
REF
R2
56k
12V
C22
220μ
25V
0
IC1 FAN7311
OLP
OLR
ON/OFF
R24
ENA
10k
C28
10n
0
C1
0
0. 2μ
2
0
C2
0
1
μ
R70
BDIM
22k
C21
10n
R3
18k
0
0
EA_IN
C3
EA_OUT BCT
4.7n
RT
R8
100k
R9
9. k
1
R15
FB
10k
D4
BAV70
CT
R527k
RT
C4 4.7n
0
0
REF
ADIM
OUTC
0
OUTD
C5 220p
0
R27
10k
GND
PGND
S_S
VIN
1μ
0
J1
0
SN
GN
SP
GP
DN
DN
DP
DP
OLR
R26
1k
0
C14
10n
0
R13
1k
0
FB
0
TX2
1 HOT
CN3
2 COLD CCFL
1
OLP1
R1
330k
Q1
C9
1μ
KST2222
OLP3
D1
BAW56
0
BAW56 C18
2. n
2
0
C17
2. n
2
0
D10
R20
10k
R21
10k
OLP4
0
D11
BAW56
C19
2.2n
0
C20
2. n
2
0
R22
10k
R28
10k
OLP2
C12
15p
C13
15p
OLP3
D8
D3
BAV70
R12
1k
0
C29
10n
0
R11
1k
0
FB
C15
10n
0
R18
1k
BAV99
0
0
0
HOT
CN4
CCFL
C30
10n
BAV99
0
0
D6
R16
1k
0
D7
BAV99
0
R17
1k
0
C10
15p
C11
15p
OLP1
M2
1 HOT
2 COLD
CN2
CCFL
OUTA
RT1
OUTB
C25
1μ
DN
DN
DP
DP
TX1
C8 10μ
2
COLD
C7 10μ
0
C27
1μ
0
M1
C26
R6
1μ
0.
0
RT
R25
10k
0
SN
GN
SP
GP
0
82k
OUTB
OUTA
C6
LTM190EX
1
HOT
CN1
CCFL
FDS8958A
R4
OLP2
FDS8958A
OLR
R14
100k
REF
OLP
2 COLD
OLP4
D9
R19
1k
OLR
BAV99
0
Figure 1. Application Circuit
REV. 1.0.1 4/20/06
AN6016
APPLICATION NOTE
2. Block Diagram and Basic Operation
2.1 Block Diagram
RT
OUTA
Output
Driver
-
+
+
OUTB
Output
Control
Logic
Output
Driver
M
RT1
RT1
Striking
Logic
EA_OUT
ADIM
EA_IN
+
-
Solr
105μA
Error Amp.
2.5V
+
Solr
-
Voltage
Reference
&
Internal
Bias
2.5VREF
2V
REF
OLR
OLP
S_S
1.4μA
UVLO
Q
SET
S
Q
CLR
R
max. 2V
min. 0.5V
OSCILLATOR
CT
6μA
S_S
1mA
PGND
OUTC
OUTD
+
-
UVLO
V
OLP
+α
V
OLP
2.5V 1.5V
OLP
max. 2V
min. 0.5V
Sburst 85μA
Va+α
BCT
BDIM
AGND
-
Sburst
+
UVLO
+
-
VIN
+
-
UVLO 5V
1.4V
ENA
VIN
Figure 2. Block Diagram
2
REV. 1.0.1 4/20/06
AN6016
APPLICATION NOTE
2.2 Under Voltage Lockout (UVLO)
The UVLO circuit guarantees stable operation of the IC’s
control circuit by stopping and starting it as a function of the
V
IN
value. The UVLO circuit turns on the control circuit
when V
IN
exceeds 5V. When V
IN
is lower than 5V, the IC’s
standby current is less than 200µA.
2.3 ENA
Applying voltage higher than 2V to ENA pin enables the
operation of the IC. Applying voltage lower than 0.7V to
ENA pin disables the operation of the inverter.
2.5VREF
Voltage
Reference
&
Internal
Bias
REF
+
-
V
IN
1.4V
ENA
Figure 5. Soft Start During Initial Operation
UVLO
+
-
UVLO 5V
V
IN
2.5 Oscillator
2.5.1 Main Oscillator
Figure 3. Under Voltage Lockout and ENA Circuits
4
Timing capacitor C
T
is charged by the reference current
source. The source is formed by the timing resistor R
T
whose
voltage is regulated at 1.25V. The sawtooth waveform of the
main oscillator circuit charges up to 2V, then the capacitor
begins discharging down to 0.5V. The capacitor starts charg-
ing again and a new switching cycle begins.
-
I
ch arg e
= -- ---------
-
3 1.25
4 R
T
Icc (mA)
2
(2.1)
0
5
10
V
IN
(V)
15
20
The main frequency can be programmed by adjusting the
values of R
T
and C
T
. The main frequency can be calculated
as shown below.
19
f
op
= ---------------------
-
32 R
T
C
T
Figure 4. Start Voltage and Operating Current
(2.2)
2.4 Soft Start
The soft-start function is provided by the S_S pin and is con-
nected through a capacitor to GND. A soft-start circuit
ensures a gradual increase in the input and output power. The
capacitor connected to S_S pin determines the rise rate of the
duty ratio. It is charged by a current source of 6µA.
2V
-
+
I
charge
CT
S
SET
Q
-
20 x I
charge
0.5V
R
CLR
Q
+
Figure 6a. Main Oscillator Circuit
REV. 1.0.1 4/20/06
3
AN6016
APPLICATION NOTE
Figure 6b. Main Oscillator Waveform
2.5.2 Burst Dimming Oscillator
Figure 7b. Burst Oscillator Waveform
Burst dimming timing capacitor BC
T
is charged by the refer-
ence current source, formed by the timing resistor R
T
whose
voltage is regulated at 1.25V. The sawtooth waveform
charges up to 2V. Once reached, the capacitor begins dis-
charging down to 0.5V, then starts charging again and a new
switching cycle begins.
3 1.25
I
ch arg e
= ----- ---------
-
-
32 R
T
2.6 Analog Dimming
For analog dimming, the lamp intensity is controlled with
the ADIM signal. A 2.5V on ADIM brings full brightness.
Analog dimming waveforms are shown in Figures 8 and 9.
(2.3)
The burst dimming frequency can be programmed by adjust-
ing the values of R
T
and BC
T
. The burst dimming frequency
can be calculated as below.
3.75
f
burst
= --------------------------
96 R
T
BC
T
(2.4)
The burst dimming frequency should be greater than 120Hz
to avoid visible flicker. To compare the input of BDIM pin
with the 0.5~2V triangular wave of burst oscillator makes
the PWM pulse for burst dimming. The PWM pulse controls
EA_OUT voltage by summing 85µA into the EA_IN pin.
Figure 7 shows burst dimming oscillator circuit and wave-
form.
-
+
CT
S
SET
Q
Figure 8. Analog Dimming at Maximum
I
charge
2V
-
20 x I
charge
0.5V
R
CLR
Q
+
Figure 7a. Burst Oscillator Circuit
Figure 9. Analog Dimming at Minimum
4
REV. 1.0.1 4/20/06
AN6016
APPLICATION NOTE
2.6.1 Setting Lamp Current Sensing Resistors
1) Positive Polarity Analog Dimming
V
REF
The data to input
The calculated data
2.5
6.5
1
0.95
0.3
5.259453252
1.103781301
10
9.059765727
kΩ
kΩ
kΩ
kΩ
V
V
C
FB
R
FB
–
+
I
lamp
V
CS
CCFL
R
CS1
V
sense
CCFL
R
sense
Rsense_eff
Diode drop voltage
Vsense
R
CS1
/R
CS2
R
CS1
R
CS2
Error
Amp.
VREF
R
CS2
R
sense
R
sense
Figure 10. Calculating Value of the
Analog Dimming Circuit Parameter
R
sense_effective
0.950148969kΩ =
R
sense
/(R
CS1
+R
CS2
)
Lamp current is sensed at R
sense
and the sensed voltage is
divided by R
CS1
and R
CS2
and is averaged at Error Amp. by
R
FB
and C
FB
.
V
DF
1 + -------------------------------------------------
I
lamp
⋅ (
R
cs1
+ R
cs2
)
= ----------------------------------------------------------
≈
R
sense
|| (
R
cs1
+ R
cs2
),
-
R
V
DF
is diode forward voltage
⎛
1
-
V
sense
=
⎜
--
⎝π
2) Negative Polarity Analog Dimming
C
FB
R
sense_eq
R
FB
–
+
V
A
V
sense
V
CS
R
CS1
R
CS2
CCFL
CCFL
Error
Amp.
VREF
R
sense
R
sense
∫
0
π
⎞
2
⋅
I
Lamp
⋅
R
sense_eq
⋅
sin
θ ⋅
dθ
⎟
– V
DF
⎠
2
= --
⋅
2
⋅
I
Lamp
⋅
R
sense_eq
– V
DF
(
1
)
-
π
R
cs2
2
V
CS
= V
sense
⋅
--------------------------- =
⎛
--
⋅
2
⋅
I
Lamp
⋅
R
sense
– V
DF
⎞
-
-
⎝π
⎠
R
cs1
+ R
cs2
R
cs2
⋅
---------------------------
-
R
cs1
+ R
cs2
Figure 11. Calculating Value of the Analog Dimming
Inverting Circuit Parameter
Lamp current is sensed at R
sense
and the sensed voltage is
divided by R
cs1
and R
cs2
and is averaged at Error Amp. by
R
FB
and C
FB
.
V
DF
1 + -------------------------------------------------
I
lamp
⋅ (
R
cs1
+ R
cs2
)
= ----------------------------------------------------------
≈
R
sense
|| (
R
cs1
+ R
cs2
),
-
R
V
DF
is diode forward voltage
⎛
1
V
sense
=
⎜
--
-
⎝π
(2.5)
R
sense_eq
Equation (2.5) assumes that the error amplifier loop is
closed. The relationship between V
CS
and V
ref
is given in
equation (2.6).
R
cs2
V
ref
= V
CS
= V
sense
⋅
---------------------------
-
R
cs1
+ R
cs2
R
cs2
2
=
⎛
--
⋅
2
⋅
I
Lamp
⋅
R
sense
– V
DF
⎞ ⋅
---------------------------
-
-
⎝π
⎠
R
cs1
+ R
cs2
R
cs1
V
sense
---------- = -------------- – 1
-
R
cs2
V
ref
∫
0
π
⎞
2
⋅
I
Lamp
⋅
R
sense_eq
⋅
sin
θ ⋅
dθ
⎟
– V
DF
⎠
2
-
= --
⋅
2
⋅
I
Lamp
⋅
R
sense_eq
– V
DF
(
1
)
π
(2.6)
(2.7)
R
cs2
2
V
CS
= V
sense
⋅
--------------------------- =
⎛
--
⋅
2
⋅
I
Lamp
⋅
R
sense
– V
DF
⎞
-
-
⎝π
⎠
R
cs1
+ R
cs2
R
cs2
⋅
---------------------------
-
R
cs1
+ R
cs2
(2.8)
For example, suppose:
V
ref
= 2.5V, I
Lamp
= 6.5mA, R
sense
= 1kΩ
,
R
cs1
= 10kΩ
Equation (2.8) assumes the error amplifier loop is closed.
The relationship between V
CS
and V
A
(dimming control
voltage) is given in equation (2.9).
V
A
⋅
R
FB
+ V
CS
⋅
R
A
V
ref
= --------------------------------------------------
-
R
FB
+ R
A
From these values, an approximate value of R
cs2
can be
derived. To get a more precise value for R
CS2
, use an itera-
tive calculation. Use R
sense
to calculate R
CS2
, because the
R
sense_eq
value is unknown. After finding the value of
R
sense_eq
, use R
sense_eq
to calculate R
CS2
. Calculate itera-
tively until the previous R
sense_eq
value is almost equal to the
current R
sense_eq
value.
(2.9)
REV. 1.0.1 4/20/06
5
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