IRFZ34NSPBF
IRFZ34NLPBF
Advanced Process Technology
Surface Mount (IRFZ34NS)
Low-profile through-hole (IRFZ34NL)
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Lead-Free
l
l
l
l
l
l
l
D 2 Pak
TO-262
Description
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D
2
Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRFZ34NL) is available for low-
profile applications.
D
V
DSS
= 55V
R
DS(on)
= 0.040Ω
G
I
D
= 29A
S
Absolute Maximum Ratings
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
A
= 25°C
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Parameter
Max.
29
20
100
3.8
68
0.45
± 20
130
16
5.6
5.0
-55 to + 175
300 (1.6mm from case )
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Thermal Resistance
Parameter
R
θJC
R
θJA
Junction-to-Case
Junction-to-Ambient (PCB mount) **
Typ.
Max.
2.2
40
Units
°C/W
2014-8-26
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IRFZ34NS/LPBF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
Drain-to-Source Breakdown Voltage
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
R
DS(ON)
Static Drain-to-Source On-Resistance
V
GS(th)
Gate Threshold Voltage
g
fs
Forward Transconductance
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
55
2.0
6.5
Typ.
0.052
7.0
49
31
40
Max. Units
Conditions
V
V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 1mA
0.040
Ω
V
GS
= 10V, I
D
= 16A
4.0
V
V
DS
= V
GS
, I
D
= 250µA
S
V
DS
= 25V, I
D
= 16A
25
V
DS
= 55V, V
GS
= 0V
µA
250
V
DS
= 44V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
34
I
D
= 16A
6.8
nC V
DS
= 44V
14
V
GS
= 10V, See Fig. 6 and 13
V
DD
= 28V
I
D
= 16A
ns
R
G
= 18Ω
R
D
= 1.8Ω, See Fig. 10
Between lead,
nH
7.5
and center of die contact
700
V
GS
= 0V
240
pF
V
DS
= 25V
100
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
57
130
29
A
100
1.6
86
200
V
ns
nC
Conditions
MOSFET symbol
showing the
G
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 16A, V
GS
= 0V
T
J
= 25°C, I
F
= 16A
di/dt = 100A/µs
D
S
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
I
SD
≤
16 A, di/dt
≤
420A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
175°C
V
DD
= 25V, starting T
J
= 25°C, L = 610µH
R
G
= 25Ω, I
AS
= 16A. (See Figure 12)
Pulse width
≤
300µs; duty cycle
≤
2%.
Uses IRFZ34N data and test conditions
2014-8-26
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IRFZ34NS/LPBF
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
1000
I , Drain-to-Source Current (A)
D
100
I , Drain-to-Source Current (A)
D
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
100
10
10
4.5V
4.5V
20µs PULSE WIDTH
T
J
= 25°C
T
C
= 25°C
1
10
1
0.1
A
100
1
0.1
20µs PULSE WIDTH
T
J
= 175°C
T
C
= 175°C
1
10
100
A
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
2.4
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= 26A
I
D
, Drain-to-Source Current (A)
T
J
= 25°C
T
J
= 175°C
2.0
1.6
10
1.2
0.8
0.4
1
4
5
6
7
V
DS
= 25V
20µs PULSE WIDTH
8
9
10
A
0.0
-60 -40 -20
0
20
40
60
V
GS
= 10V
80 100 120 140 160 180
A
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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IRFZ34NS/LPBF
1200
1000
800
C
oss
600
V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd
, C
ds
SHORTED
C
rss
= C
gd
C
iss
C
oss
= C
ds
+ C
gd
20
I
D
= 16A
V
DS
= 44V
V
DS
= 28V
16
C, Capacitance (pF)
12
8
400
C
rss
200
4
0
1
10
100
A
0
0
10
20
FOR TEST CIRCUIT
SEE FIGURE 13
30
40
A
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
I
SD
, Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
I
D
, Drain Current (A)
100
10µs
T
J
= 175°C
T
J
= 25°C
100µs
10
1ms
10
1
0.4
0.8
1.2
1.6
V
GS
= 0V
A
1
1
T
C
= 25°C
T
J
= 175°C
Single Pulse
10
10ms
A
100
2.0
V
SD
, Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
2014-8-26
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IRFZ34NS/LPBF
V
DS
30
R
D
V
GS
R
G
D.U.T.
+
25
-
V
DD
I
D
, Drain Current (A)
10 V
20
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
15
Fig 10a.
Switching Time Test Circuit
V
DS
90%
10
5
0
25
50
75
100
125
150
175
T
C
, Case Temperature ( °C)
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 9.
Maximum Drain Current Vs.
Case Temperature
10
Fig 10b.
Switching Time Waveforms
Thermal Response (Z
thJC
)
1
D = 0.50
0.20
0.10
0.05
P
DM
SINGLE PULSE
(THERMAL RESPONSE)
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
=P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
0.1
0.02
0.01
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
2014-8-26
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