AN4173
Application note
10-bit ADC - Configuration Guide for SPC56xBxx and
SPC56xCxx products
Introduction
The aim of this document is to clarify the usage of the ADC 10-bit SAR peripheral timing
parameters in order to help the user to find the best configuration to optimize the conversion
time and the quality/precision of the sampled signal considering its input impedance.
This document describes an application able to acquire sinusoidal signals of up to 500 kHz
using two DMA channels triggered by PIT and EOC signal.
The quality of the signal is estimated using an offline computation of the FFT of the sampled
values.
September 2013
Doc ID 023727 Rev 3
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Contents
AN4173
Contents
1
2
Considerations on the input impedance of the signal source . . . . . . . 5
ADC 10-bit timing configuration parameters . . . . . . . . . . . . . . . . . . . . . 8
2.1
2.2
2.3
Conversion timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
SPC56xBxx and SPC56xCxx family ADC 10-bit timing properties . . . . . . 9
Latency of the ADC conversion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3
Application code structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1
3.2
3.3
3.4
3.5
Peripherals used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Code implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Performance comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
How to choose the right parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.4.1
Degradation of the signal acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Appendix A Reference documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
A.1
Reference documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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List of tables
List of tables
Table 1.
Table 2.
Table 3.
ADC sampling and conversion timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
ADC sampling and conversion timing obtained by test code . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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List of figures
AN4173
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Input equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Transient behavior during sampling phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Conversion timings (configuration for sampling rate @ 20 MHz) . . . . . . . . . . . . . . . . . . . . 11
STM configuration function extracted code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
ADC init function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
ADC start conversion function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Fast Fourier Transform of the acquired sinusoidal signal at 10 kHz. . . . . . . . . . . . . . . . . . 16
Reconstructed signal at 10 Khz with sampling frequency 20Khz . . . . . . . . . . . . . . . . . . . . 17
Reconstructed signal at 10 Khz with sampling frequency 100Khz . . . . . . . . . . . . . . . . . . . 18
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Considerations on the input impedance of the signal source
1
Considerations on the input impedance of the signal
source
The impedance relative to the signal source can limit the ADC’s sample rate. Furthermore a
current limiter resistance and an RC filter are often necessary to minimize the current
request and to attenuate the noise present on the input pin. This external network can
generate accuracy problems for the ADC converter and for this reason it is important to
invest time in reaching the right adaptation.
The capacitance C
S
associated with the internal ADC circuitry, combined with the resistance
to the input signal source R
S
creates a low-pass filter. This RC time constant can increase
the time needed to stabilize the incoming signal before the ADC can sample it, and if the
input signal has a high frequency, which means that it changes quickly over time, this low-
pass filter can distort the ADC’s acquisition.
Figure 1.
Input equivalent circuit
Moreover, considering a sinusoidal signal as input, if the source has a low impedance, the
RC time constant will not be relevant and the voltage on the capacitance will quickly match
the input voltage.
Furthermore, all the other internal ADC components, such as the pin capacitance C
Px
, the
sampling, and the channel selection switch impedance, can limit the maximum frequency
applicable to the ADC input.
The internal resistance of the source must allow the capacitance to reach its final value
before the end of sample time.
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