AN3027
Application note
How to design a transition-mode PFC pre-regulator
with the L6563S and L6563H
Introduction
The transition-mode (TM) technique is widely used for power factor correction in low and
middle power applications such as lamp ballasts, high-end adapters, flatscreen TVs and
monitors, PC power supplies and all SMPS having to meet regulations in harmonics
reduction. The L6563S and L6563H are the latest devices from STMicroelectronics for these
applications that may require a low-cost power factor correction.
The L6563S is a current-mode PFC controller operating in transition mode (TM). Packaged
in the same SO14 pinout as its predecessor L6563, it offers improved performance and
additional functions. The L6563H is the SO16 pinout version, embedding the same features
as the L6563S with the addition of a high-voltage startup power source.
These functions make the L6563H especially suitable for applications that need to be
compliant with energy-saving regulations and where the PFC pre-regulator works as the
master stage without an auxiliary SMPS.
Figure 1.
Typical system block diagram
February 2011
Doc ID 16134 Rev 4
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Contents
AN3027
Contents
1
2
3
Introduction to power factor correction . . . . . . . . . . . . . . . . . . . . . . . . . 4
TM PFC operation (boost topology) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Designing a TM PFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1
3.2
3.3
Input specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Power section design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3.1
3.3.2
3.3.3
3.3.4
3.3.5
3.3.6
Bridge rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Boost inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Power MOSFET selection and dissipation . . . . . . . . . . . . . . . . . . . . . . . 14
Boost diode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4
L6563S biasing circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4
5
6
7
8
L6563H: high-voltage startup transition-mode PFC . . . . . . . . . . . . . . 31
Design example using the L6563S-TM PFC Excel spreadsheet . . . . . 34
EVL6563S-100W and EVL6563H-100W demonstration boards . . . . . . 37
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
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AN3027
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Typical system block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Boost converter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Inductor current waveform and MOSFET timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Switching frequency, fixing the line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
θ
1
and
θ
2
dependence on input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Capacitive losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Conduction losses and total losses in the STF7NM50N MOSFET for the L6563S TM
PFC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
L6563S internal schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Open loop tran. function bode plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Phase function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Multiplier characteristics family for V
FF
= 1 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Multiplier characteristics family for V
FF
= 3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Mains detector and discharge resistor allow fast response to sudden line drops not
depending on the external RC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Brownout function in L6563S and L6563H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Optimum MOSFET turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Tracking boost block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
L6563H - SO16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
L6563S - SO14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
High-voltage startup generator: internal schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Timing diagram: normal power-up and power-down sequences . . . . . . . . . . . . . . . . . . . . 32
High-voltage startup behavior during latch-off protection . . . . . . . . . . . . . . . . . . . . . . . . . . 33
High-voltage startup, managing the DC-DC output short-circuit. . . . . . . . . . . . . . . . . . . . . 33
Excel spreadsheet design specification input table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Other design data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
TM PFC using the L6563S Excel spreadsheet schematic . . . . . . . . . . . . . . . . . . . . . . . . . 35
TM PFC using the L6563H Excel spreadsheet schematic . . . . . . . . . . . . . . . . . . . . . . . . . 35
Excel spreadsheet BOM - 100 W TM PFC based on L6563S/H . . . . . . . . . . . . . . . . . . . . 36
Wide-range 100 W demonstration board electrical circuit (EVL6564-100W) . . . . . . . . . . . 37
Wide-range 100 W demonstration board electrical circuit (EVL6563H-100W) . . . . . . . . . . 38
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Introduction to power factor correction
AN3027
1
Introduction to power factor correction
The front-end stage of conventional offline converters, typically consisting of a full-wave
rectifier bridge with a capacitor filter, has an unregulated DC bus from the AC mains. The
filter capacitor must be large enough to have a relatively low ripple superimposed on the DC
level. This means that the instantaneous line voltage is below the voltage on the capacitor
most of the time, thus the rectifiers conduct only for a small portion of each line half-cycle.
The current drawn from the mains is a series of narrow pulses whose amplitude is 5-10
times higher than the resulting DC value. Many drawbacks result, such as a much higher
peak and RMS current down from the line, distortion of the AC line voltage, overcurrents in
the neutral line of the three-phase systems and, consequently, a poor utilization of the power
system's energy capability. This can be measured in terms of either total harmonic distortion
(THD), as norms provide for, or power factor (PF), intended as the ratio between the real
power (the one transferred to the output) and the apparent power (RMS line voltage
multiplied by the RMS line current) drawn from the mains, which is more immediate. A
traditional input stage with capacitive filter has a low PF (0.5-0.7) and a high THD (>100%).
By using switching techniques, a power factor corrector (PFC) preregulator, located
between the rectifier bridge and the filter capacitor, allows drawing a quasi-sinusoidal
current from the mains, in phase with the line voltage. The PF becomes very close to 1
(more than 0.99 is possible) and the previously mentioned drawbacks are eliminated.
Theoretically, any switching topology can be used to achieve a high PF but, in practice, the
boost topology has become the most popular thanks to the advantages it offers:
●
●
Primarily because the circuit requires the fewest external parts (low-cost solution)
The boost inductor located between the bridge and the switch causes the input di/dt to
be low, thus minimizing the noise generated at the input and, therefore, the
requirements on the input EMI filter
The switch is source-grounded, therefore easy to drive
●
However, boost topology requires the DC output voltage to be higher than the maximum
expected line peak voltage (400 VDC is a typical value for 230 V or wide-range mains
applications). In addition, there is no insulation between the input and output, thus any line
voltage surge is passed on to the output. Two methods of controlling a PFC pre-regulator
are currently widely used: the fixed-frequency, average current mode PWM (FF PWM) and
the transition mode (TM) PWM (fixed on-time, variable frequency). The first method needs
complex control that requires a sophisticated controller IC (ST's L4981, with the variant of
the frequency modulation offered by the L4981) and a considerable component count. The
second one requires a simpler control (implemented by ST's L6563S), much fewer external
parts and is therefore much more economical. With the first method the boost inductor
works in continuous conduction mode, while TM makes the inductor work on the boundary
between continuous and discontinuous mode, by definition. For a given throughput power,
TM operation involves higher peak currents. This, also consistent with cost considerations,
implies its use in a lower power range (typically up to 250 W), while the former is
recommended for higher power levels. To conclude, FF PWM is not the only alternative
when CCM operation is desired. FF PWM modulates both switch-on and switch-off times
(their sum is constant by definition), and a given converter operates in either CCM or DCM
depending on the input voltage and the load conditions. Exactly the same result can be
achieved if the on-time only is modulated and the off-time is kept constant, in which case,
however, the switching frequency is no longer fixed. This is referred to as “fixed-off-time”
(FOT) control. Peak-current-mode control can still be used. In this application note transition
mode is studied in depth.
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AN3027
TM PFC operation (boost topology)
2
TM PFC operation (boost topology)
The operation of the PFC transition mode controlled boost converter can be summarized in
the following description.
The AC mains voltage is rectified by a bridge and the rectified voltage is delivered to the
boost converter. This, using a switching technique, boosts the rectified input voltage to a
regulated DC output voltage (Vo).
The boost converter consists of a boost inductor (L), a controlled power switch (Q), a catch
diode (D), an output capacitor (Co) and, obviously, a control circuit (see figure below). The
goal is to shape the input current in a sinusoidal fashion, in phase with the input sinusoidal
voltage. To do this, the L6563S uses the transition mode technique.
Figure 2.
Boost converter circuit
The error amplifier compares a partition of the output voltage of the boost converter with an
internal reference, generating an error signal proportional to the difference between them. If
the bandwidth of the error amplifier is narrow enough (below 20 Hz), the error signal is a DC
value over a given half-cycle.
The error signal is fed into the multiplier block and multiplied by a partition of the rectified
mains voltage. The result is a rectified sinusoid whose peak amplitude depends on the
mains peak voltage and the value of the error signal.
The output of the multiplier is in turn fed into the (+) input of the current comparator, thus it
represents a sinusoidal reference for PWM. In fact, when the voltage on the current sense
pin (instantaneous inductor current multiplied by the sense resistor) equals the value on the
(+) of the current comparator, the conduction of the MOSFET is terminated. As a
consequence, the peak inductor current is enveloped by a rectified sinusoid. As
demonstrated in
Section 3.3.4,
TM control causes a constant on-time operation over each
line half-cycle.
After the MOSFET has been turned off, the boost inductor discharges its energy into the
load until its current goes to zero. The boost inductor has now run out of energy, the drain
node is floating and the inductor resonates with the total capacitance of the drain. The drain
voltage drops rapidly below the instantaneous line voltage and the signal on ZCD drives the
MOSFET on again and another conversion cycle starts.
This low voltage across the MOSFET at turn-on reduces both the switching losses and the
total drain capacitance energy that is dissipated inside the MOSFET.
The resulting inductor current and the timing intervals of the MOSFET are shown in
Figure 3,
where it is also shown that, by geometric relationships, the average input current
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