AN1504
APPLICATION NOTE
STARTING A PWM SIGNAL DIRECTLY
AT HIGH LEVEL USING THE ST7 16-BIT TIMER
by Microcontroller Division Applications
INTRODUCTION
The 16-bit timer is a standard peripheral of the ST7 microcontroller family. This peripheral can
be used for a variety of purposes, including pulse length measurement of up to two input sig-
nals (input capture feature) or generation of up to two output waveforms (output compare and
PWM mode).
This application note is about using the PWM mode of the standard 16 bit timer. It explains
how to synchronize the PWM signal output. In other words, how to make sure it outputs a high
state when the counter restarts after it has been stopped (for any reason) or simply when it
starts at the beginning of the application. In some applications, like motor control, it may be es-
sential to output the high level part of the signal duty cycle when the counter is started.
AN1504/0302
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STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER
1 16-BIT TIMER PWM MODE
1.1 DESCRIPTION
In pulse width modulation mode, the frequency of the signal is determined by the value in
Output Compare 2 register (OC2R) and the pulse length by the value in the Output Compare
1 register (OCR1) or duty cycle value.
The OLVL2 bit selects the level to be applied to the output pin after a successful comparison
between the counter and the OC2R register and the OLVL1 bit selects the level to be applied
on the output after a successful comparison between the counter and the OC1R register
1.2 NORMAL BEHAVIOUR
Figure 1 shows the normal behaviour of output compare 1 (OCMP1) pin when a PWM signal
is output with OLVL2=1 and OLVL1=0.
Figure 1. PWM output when OLVL2=1 and OLVL1=0
FREE RUNNING
COUNTER VALUE
Tmax = Ttimer × 65535
FFFFh
FFFCh
OC2R
OC1R
0000h
time
OCMP1
Ouput Compare pin
Timer output
OLVL2= 1
OLVL1=0
time
When the counter reaches the OC2R register value, the value of OLVL2 is applied on the
OCMP1 pin (=1 in this case). When the counter reaches the value of the OC1R register, the
value of OLVL1 is applied on the OCMP1 pin (=0). The formulas needed to compute the
values to be put in OC2R and OC1R registers are in the 16-bit Timer chapter of the ST7 da-
tasheets. As the 16-bit Timer is reset at FFFC, the formulas are:
OCiR=((t*Fcpu)/presc)-5 where:
t= period of the signal
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STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER
Fcpu= CPU frequency
presc= Timer 16 presc
Figure 2 shows the waveforms we see on an oscilloscope if the PWM signal is initialized at
10KHz with a 50% duty cycle (OLVL2=1 and OLVL1=0) and if a flag is set as soon as the
counter is started.
Figure 2. OCMP1 waveform with 50% Duty Cycle
PWM
OUTPUT
Timer 16 start
output enabled
flag
We can see from this figure that we have to wait until the counter reaches the OC2R register
value to get the first high state on the OCMP1 pin. So we have lost one PWM cycle before get-
ting the first high level and in some applications, like energizing motor windings, this is not ac-
ceptable. After a motor demagnetization phase, if the windings are not energized immediately
when the PWM is started, the motor can stall. The purpose of the following sections is to ex-
plain how to get a high level on OCMP1 pin immediately.
To solve the problem, we have to handle two cases.
1. The PWM signal is high when the timer is between FFFC (its reset value) and the OC1R
register value. This means OLVL1=0 and OLVL2=1.
2. The PWM signal is high when the timer is between the OC1R register value and the OC2R
register value. This means OLVL1=1 and OLVL2=0.
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STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER
2 FIRST CASE: OLVL2=1 AND OLVL1=0
In this case, to force a high state on the OCMP1 pin when the timer is started:
– Initialize the timer in PWM mode and set the PWM frequency with a 0% duty cycle
– Reset the timer (at FFFC)
– Load the OC1R register with a value close to FFFC (FFFD for example) and configure
OLVL1=1 and OLVL2=0.
– Start the timer. It immediately reaches the value of the OC1R register and OCMP1 pin goes
into the state defined by the OLVL1 bit, which is high.
– Then, write the correct duty cycle value in the OC1R register and the correct state in the
OLVL2 and OLVL1 bits (OLVL2=1 and OLVL1=0).
The following code gives an example of how to restart (or start) the 16-bit timer this way. This
is for Timer A already initialized in PWM mode at 10KHz with the 16-bit timer clocked at 1MHz
(TACR2=10011000, TAOC2HR=$00 and TAOC2LR=$5F for 10KHz at 1MHz clock.
This is how to calculate the values to be put in the registers:
– OC2R represents the signal period. The frequency is 10KHz, so the period is t=100µs. f
CPU
is 8MHz and the Timer prescaler is 8 because the Timer is at 1MHz.
OC2R=((t*Fcpu)/presc)-5=((100.10-6*8.10+6)/8)-5=95 (005F in hexadecimal).
– OC1R represents the pulse length, the duty cycle is 50% so the pulse length is
100µs*50%=50µs. So the value to be put in OC1R is:
OC1R=((50.10-6*8.10+6)/8)-5=45 (002D in hexadecimal).
Note:
This method can be applied when the counter is first started as the starting value is
0000.
Initialization:
In this example the duty cycle is first set to 0% with OLVL1=0 and OLVL2=0
ld
ld
ld
ld
ld
ld
ld
ld
A,#%00000000; set OLVL1=0 and OLVL2=0
TACR1,A
A,#%10011000; clock in/8=1MHz with 16 MHz quartz
TACR2,A
A,#$00
TAOC2HR,A ;10KHz frequency for the PWM signal (see formulas)
A,#$5F
TAOC2LR,A
Synchronization
ld
ld
ld
ld
ld
A,#%00000001;Set OLVL1=1 and OLVL2=0
TACR1,A
;load corresponding control register 1
A,#$FF
TAOC1HR,A ;fix compare 1 to FFFD to force PWM high as soon as possible
A,#$FD
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STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER
ld TAOC1LR,A
clr TACLR
;reset timer B to FFFC
bset PADR,#2 ;set flag synchronisation of timer B
.wait_TA_C2
ld A,TACHR
jrne wait_TA_C2;wait timer A=0000 to restore duty cycle
ld A,#%00000100
ld TACR1,A
;set OLVL1=0 and OLVL2=1
ld A,#$00
ld TAOC1HR,A
ld A,#$2D
;restore duty cycle to 50%
ld TAOC1LR,A
bres PADR,#2 ;reset synchronisation flag
Figure 3 shows the waveforms seen on an oscilloscope for OCMP1 pin and the synchroniza-
tion flag using the above software example when the 16-bit timer is started or restarted.
Figure 3. OCMP1 and synchronization flag : OLVL2=1 and OLVL1=0
PWM
OUTPUT
Timer 16 start
output enabled
flag
We can see in Figure 3 that the OCMP1 pin outputs a high state directly after starting the
PWM signal. This avoids losing a PWM cycle in applications where an immediate high state is
required.
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测试/测量
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