AN1131
APPLICATION NOTE
MIGRATING APPLICATIONS FROM ST72511/311/314/124 TO
ST72521/321/324
by Microcontroller Division Applications
1 INTRODUCTION
This application note provides information on migrating ST72511/311R, 314N, 314/124J ap-
plications to the ST72521/321R, 321/324J family. The ST72521/321R, 321/324J family is de-
signed and manufactured in a more recent technology.
Table 1. Migration Cross-Reference Table
From
To
ST72(T)511R
ST72(F)521R
ST72(T)311R
ST72(F)321R
ST72(T)314N
ST72(F)321R
ST72(T)314J ST72(T)124J
ST72(F)324J * ST72(F)324J *
Note:
If Timer A OC2 and IC2 functions are used in the ST72314 application then you have to
migrate your application to ST72321 instead of ST72324.
AN1131/503
1/17
1
MIGRATING APPLICATIONS FROM ST72511/311/314/124 TO ST72521/321/324
1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 FEATURE OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 HARDWARE COMPATIBILITY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 PIN-OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 HARDWARE CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2.1 Oscillator load capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2.2 Not Connected I/Os . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2.3 Asynchronous RESET pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 TIMING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1 CYCLE ACCURACY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2 CLOCK SECURITY SYSTEM (CSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.3 MAIN CLOCK OUT (MCO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.4 WATCHDOG TIMINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.5 CAN CLOCK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 REGISTER MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1 REGISTER ADDRESS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2 BIT LOCATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.2.1 Main Clock System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.2.2 External Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.2.3 SPI/SS pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6 I/O PORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6.1 EXTERNAL INTERRUPT HANDLING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7 PERIPHERALS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.1 16-BIT TIMER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.1.1 PWM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.1.2 One Pulse Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1.3 ST72324J Timer A Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.2 SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.2.1 Baud Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.2.2 HALT mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/17
MIGRATING APPLICATIONS FROM ST72511/311/314/124 TO ST72521/321/324
7.3 10-BIT ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.4 SCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.4.1 SCI Prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.4.2 SCI TDO pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3/17
1
MIGRATING APPLICATIONS FROM ST72511/311/314/124 TO ST72521/321/324
2 FEATURE OVERVIEW
Table 2. 64-Pin Package Migration
Feature
Package
Program Memory
Operating
Supply
Register Map
RESET
I/Os
Slow Mode
Active-HALT
Main Clock Out
Watchdog
16-bit Timer
ART-PWM Timer
SPI
SCI
I
2
C
ADC
CAN
LVD
CSS
Emulator
Prog. tools
ST72314N
CFlash/ROM
ST72311R
ST72511R
ST72321R
ST72521R
64-pin (no change)
EPROM/OTP/ROM
HDFlash/ROM
3.8V to 5.5V with f
CPU
= 8MHz
3.0 to 3.6V with f
CPU
max = 4MHz
3.0V to 5.5V
128 bytes
Transistor based pull-up
CMOS V
IL
and V
IH
128 bytes (minor changes)
Real pull-up resistor
V
IL
=0.16.V
DD
and V
IH
=0.85.V
DD
44
48 (no change)
Yes
Yes
(minor programming difference)
4096 t
CPU
delay on wake-up
no delay on wake-up
f
OSC
/2
f
CPU
Yes
Yes (minor timing change)
Yes (minor change in PWM
Yes
and One Pulse modes)
No
Yes (no change)
Yes (control bits moved from
Yes
Miscellaneous register to SPI
register)
Yes (baudrate increased,
Yes
prescaler enhanced)
No
Yes (upward compatible)
8-bit
10-bit (upward compatible)
No
Yes
No
Yes (no change)
3 Levels
1 Level
3 Levels
(4.5V/4V/3.5V)
(4.5V)
(4.5V/4V/3.5V)
Yes (fixed
No
Yes (adapted frequency)
frequency)
ST7MDT20M-EMU3 and
ST7MDT2-EMU2B and ST7MTD2-DVP2
ST7MDT20-DVP2 (planned)
ST7MDT2-EPB2
ST7MDT20M-EPB
4/17
MIGRATING APPLICATIONS FROM ST72511/311/314/124 TO ST72521/321/324
Table 3. 44-Pin Package Migration
Feature
Package
Program Memory
Operating
Supply
Register Map
RESET
I/Os
Slow Mode
Active-HALT
Main Clock Out
Watchdog
ST72314J
CFlash/ROM
3.0V to 5.5V
128 bytes
Transistor based pull-up
CMOS V
IL
and V
IH
Yes
4096 t
CPU
delay on wake-
up
f
OSC
/2
Yes
ST72324J
ST72321J
44-pin (no change)
HDFlash/ROM
3.8V to 5.5V with f
CPU
= 8MHz
3.0 to 3.6V with f
CPU
max = 4MHz
128 bytes (minor changes)
Real pull-up resistor
V
IL
=0.16.V
DD
and V
IH
=0.85.V
DD
32 (no change)
Yes (minor programming difference)
no delay on wake-up
16-bit Timer
Yes
ART-PWM Timer
SPI
SCI
I
2
C
ADC
CSS
Emulator
Prog. tools
Yes
Yes
8-bit
Yes (fixed
frequency)
ST7MDT2-EMU2B and
ST7MTD2-DVP2
ST7MDT2-EPB2
f
CPU
Yes (minor timing change)
Yes (minor change in PWM and One Pulse modes)
IC2, OC2 and PWM
functions not available
No change
on Timer A
No (no change)
Yes (upward compatible)
Yes (control bits
moved from Miscellaneous register to SPI register)
Yes (baudrate increased, prescaler enhanced)
No (no change)
Yes (upward compatible)
10-bit (upward compatible)
Yes (adapted frequency)
ST7MDT20J-EMU3 and
ST7MDT20-DVP2 (planned)
ST7MDT20J-EPB
5/17
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