AN1711
APPLICATION NOTE
SOFTWARE TECHNIQUES
FOR COMPENSATING ST7 ADC ERRORS
INTRODUCTION
The purpose of this document is to explain in detail some software techniques which you can
apply to compensate and minimise ADC errors. The document also gives some general tips
on writing software for the ADC. For a list of related application notes that contain other useful
information about ADCs see
section 6 on page 39.
This document provides some methods of calibrating the ADC. Some ADC errors like Offset
and Gain errors can be cancelled using these simple software techniques. Other errors like
Differential Linearity Error and Integral Linearity Error are associated with the ADC design and
cannot be compensated easily.
The example software provided with this application note is explained in brief in
section 5 on
page 35.
Rev. 1.0
AN1711/0804
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Table of Contents
1 GENERAL SOFTWARE CONSIDERATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 CHECKING FOR FADC (MAX) SUPPORTED BY THE DEVICE . . . . . . . . . . . . 4
1.2 SELECTING CONVERSION CHANNEL (AND STARTING CONVERSION) . . . 5
1.3 POLLING FOR END OF CONVERSION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4 ADC CONVERSION RESULT FORMAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.5 READING THE ADC CONVERSION RESULTS . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.6 ENTERING HALT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.7 USING A TIMER TO MAKE PERIODIC CONVERSIONS . . . . . . . . . . . . . . . . . . 6
1.8 USING A 10-BIT ADC AS AN 8-BIT ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.9 COMBINED REGISTER FOR CONTROL BITS AND LSB OF CONVERSION RE-
SULT
7
1.10ZOOMING TO LOW VOLTAGE SIGNALS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 SOFTWARE TECHNIQUES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 AVERAGING TECHNIQUE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 AVERAGING BY QUEUE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3 HISTOGRAM TECHNIQUE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.4 NOISE FILTERING ALGORITHM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3 REDUCING SYSTEM NOISE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.1 INSERT “NOP” WHILE CHECKING FOR EOC . . . . . . . . . . . . . . . . . . . . . . . . 19
3.2 USING SLOW MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.3 USING WAIT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4 EXECUTING CODE FROM RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4 CALIBRATING THE ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1 CALIBRATION ISSUES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.2 CALIBRATION METHODS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.2.1 Use accurate voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
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Table of Contents
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
Use of external DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Maintaining a Lookup table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Linear compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Zone compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Autocalibration for Offset and Gain errors . . . . . . . . . . . . . . . . . . . . . . . . . 30
Calibration for Errors using 2 different zones . . . . . . . . . . . . . . . . . . . . . . 33
5 SOFTWARE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5.1 FILE PACKAGE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5.1.1 ADC_tech.h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.1.2 ADC_tech.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.1.3 Main.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.2 DEPENDENCIES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.3 GLOBAL VARIABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.4 INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.5 CODE SIZE AND EXECUTION TIME . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6 RELATED DOCUMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
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SOFTWARE TECHNIQUES FOR COMPENSATING ST7 ADC ERRORS
1 GENERAL SOFTWARE CONSIDERATIONS
This section gives some basic guidelines for programming the ADC.
General Procedure
■
Check for f
ADC
(max) supported by the device
■
■
■
Select the conversion channel (and start conversion)
Poll for End of Conversion
Read the ADC conversion results
Special Procedures
■
Entering HALT mode
■
Using a timer with the ADC to perform periodic conversions
Other Special Features
Not all ST7 ADCs have the same features, refer to the datasheet of the ST7 product you are
using for specific information. Depending on the device, you may need to apply these tips in
your ADC software:
■
■
■
Using 10-bit ADC as 8-bit ADC
Handling Control Bits located in same register as Data LSBs
Zooming to low voltage signals with embedded amplifier
1.1 CHECKING FOR F
ADC
(MAX) SUPPORTED BY THE DEVICE
Before configuring the ADC and starting any conversions, you need to check the f
ADC
max-
imum supported by the device. This value is documented in the ST7 datasheets, you should
refer to the ADC electrical characteristics section.
For example:- Some devices have a SPEED bit for working at f
CPU
/2 but the f
ADC
(max) is 2
MHz. For ST7 devices, f
CPU
can be up to 8 MHz. In this case you cannot utilize the SPEED bit,
because it will boost f
ADC
to 4 MHz, which is greater than the allowed maximum (f
ADC
(max)
=2 MHz).
If f
CPU
is 4 MHz or lower (in Run or Slow mode), you can use the SPEED bit to run the ADC
at f
CPU
/2, and still respect the 2MHz. f
ADC
(max).
Some devices support f
ADC
(max) = 4MHz. It is thus necessary to check the electrical charac-
teristics before configuring the ADC.
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SOFTWARE TECHNIQUES FOR COMPENSATING ST7 ADC ERRORS
1.2 SELECTING CONVERSION CHANNEL (AND STARTING CONVERSION)
The ADC control register provides control bits for selecting the conversion channel. Whenever
you change the channel or write in the control register, the ADC conversion starts again (if the
ADC is already enabled). The voltage is sampled from the selected channel.
There is no stabilization time required by the ADC after changing the conversion channel and
starting conversion. Please refer to the datasheets.
1.3 POLLING FOR END OF CONVERSION
The ADC status register has an EOC bit which is for notifying the end of conversion. In some
ST7 devices this bit is named COCO for “conversion complete”.
Once the ADC is enabled, the conversion is started in continuous mode (except in ADCs with
single-conversion feature). When you check and find that the EOC bit is set, the data is avail-
able in the data registers (see next section).
1.4 ADC CONVERSION RESULT FORMAT
The conversion result of the ADC is available in the ADC data registers. In devices with an 8-
bit ADC, an 8-bit register generally called ADCDR, is available for reading the conversion re-
sult.
In a 10-bit ADC, 2 registers are available for reading the 10-bit result. The most significant 8
bits are available in a register called ADCDRH and the 2 least significant bits are available in
the other register generally named ADCDRL.
This requires reading the ADCDRL and then ADCDRH. The 10-bit result is obtained by left-
shifting ADCDRH by 2 bits and then ‘OR’ing the value of the 2 bits ADCDRL, read previously
into a variable. All ST7 10-bit ADCs use the same format, which makes it easy to port software
from one device to another. Please take care that the 2-bits of ADCDRH are not lost when left-
shifting the register by 2 bits. Please refer to the datasheet for the conversion result format.
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