LTC1164
Low Power, Low Noise, Quad
Universal Filter Building Block
FEATURES
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DESCRIPTIO
Low Power
4 Filters in a 0.3" Wide Package
1/2 the Noise of the LTC1059, 60, 61 Devices
Wide Output Swing
Clock-to-Center Frequency Ratios of 50:1 and 100:1
Operates from
±2.37V
to
±8V
Power Supplies
Customized Version with Internal Resistors Available
Ratio of 50:1 and 100:1 Simultaneously Available
APPLICATIO S
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Antialiasing Filters
Telecom Filters
Spectral Analysis
Loop Filters
For Fixed Lowpass Filter Requirements use the
LTC1164-XX Series
The LTC
®
1164 consists of four low power, low noise
2nd order switched capacitor filter building blocks. Each
building block typically consumes 850µA supply current.
Low power is achieved without sacrificing noise and
distortion. Each building block, together with 3 to 5
resistors, can provide 2nd order functions like lowpass,
highpass, bandpass, and notch. The center frequency of
each 2nd order section can be tuned with an external clock,
or a clock and resistor ratio. For Q < 5, the center frequency
range is from 0.1Hz to 20kHz. Up to 8th order filters can
be realized by cascading all four 2nd order sections. Any
classical filter realization (such as Butterworth, Cauer,
Bessel, and Chebyshev) can be formed.
A customized monolithic version of the LTC1164
including internal thin film resistors can be obtained.
Consult LTC Marketing for details.
The LTC1164 is manufactured using Linear Technology’s
enhanced LTCMOS
™
silicon gate process.
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTCMOS trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
Dual 5th Order Linear Phase Filter with Stopband Notch
549k
63.4k
210k
V
IN1
102k
133k
174k
1
2
3
4
24
23
22
21
78.7k
8.66k
V
OUT1
5
6
V
+
0.1µF
174k
7
8
9
133k 10
102k
V
IN2
210k
11
12
LTC1164
20
19
18
17
16
15
14
13
63.4k
549k
49.9k
78.7k
36.5k
f
CLK
8.66k
V
OUT2
C2
0.1µF
C1
V
–
49.9k
GAIN (dB)
Dual 5th Order Linear Phase Filter with
Stopband Notch, f
CLK
= 500kHz
10.00
0.0
–10.00
–20.00
V
OUT2
V
OUT1
36.5k
–30.00
–40.00
–50.00
–60.00
–70.00
–80.00
–90.00
1k
SUPPLY
VOLTAGE
V
IN
C1 = 0.0033µF
C2 = 0.0068µF
f
CLK
= 500kHz
WIDEBAND NOISE = 50µV
RMS
TOTAL SUPPLY CURRENT = 3mA
ALL RESISTORS ARE 1% METAL FILM
±2.5
±5.0
±7.5
1V
RMS
2V
RMS
4V
RMS
LTC1164 • TA01
U
10k
FREQUENCY (Hz)
100k
LTC1164 • TA02
U
U
TOTAL
HARMONIC DISTORTION
SIGNAL/NOISE
0.015% (–76dB)
0.025% (–72dB)
0.04% (–68dB)
86dB
92dB
98dB
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1
LTC1164
ABSOLUTE
AXI U
RATI GS
Total Supply Voltage (V
+
to V
–
) ............................ 16.5V
Power Dissipation .............................................. 500mW
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
INV B
HPB/NB
BPB
LPB
SB
AGND
V
+
SA
LPA
1
2
3
4
5
6
7
8
9
24 INV C
23 HPC/NC
22 BPC
21 LPC
20 SC
19
V
–
18 CLK
17 50/100
16 LPD
15 BPD
14 HPD
13 INV D
ORDER PART
NUMBER
LTC1164ACN
LTC1164CN
INV B 1
HPB/NB 2
BPB 3
LPB 4
SB 5
AGND 6
V
+
7
SA 8
LPA 9
BPA 10
HPA 11
INV A 12
BPA 10
HPA 11
INV A 12
N PACKAGE
24-LEAD PDIP
T
JMAX
= 110°C,
θ
JA
= 65°C/W
J PACKAGE
24-LEAD CERDIP
T
JMAX
= 150°C,
θ
JA
= 100°C/W
OBSOLETE PACKAGE
Consider the N24 Package as an Alternate Source
LTC1164AMJ
LTC1164MJ
LTC1164ACJ
LTC1164CJ
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Voltage Range
Voltage Swings
The
●
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Internal Op Amps) V
S
=
±5V,
R
L
= 5kΩ unless otherwise noted.
CONDITIONS
V
S
=
±2.5V
V
S
=
±5.0V
V
S
=
±7.5V
V
S
=
±5.0V
V
S
=
±5.0V
V
S
=
±5.0V
V
S
=
±5.0V
MIN
±2.37
●
Output Short Circuit Current (Source/Sink)
DC Open Loop Gain
GBW Product
Slew Rate
2
U
U
W
W W
U
W
(Note 1)
Operating Temperature Range
LTC1164AM, LTC1164M
(OBSOLETE)
..... –55°C to 125°C
LTC1164AC, LTC1164C .......................–40°C to 85°C
TOP VIEW
24 INV C
23 HPC/NC
22 BPC
21 LPC
20 SC
19 V
–
18 CLK
17 50/100
16 LPD
15 BPD
14 HPD
13 INV D
ORDER PART
NUMBER
LTC1164CSW
LTC1164ACSW
SW PACKAGE
24-LEAD PLASTIC SO
T
JMAX
= 110°C,
θ
JA
= 75°C/W
LTC221/222 • POI01
TYP
±1.6
±4.2
±6.1
1
80
2
1.6
MAX
±8
UNITS
V
V
V
V
mA
dB
MHz
V/µs
±3.8
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LTC1164
ELECTRICAL CHARACTERISTICS
PARAMETER
Center Frequency Range
Input Frequency Range (Note 2)
Clock-to-Center Frequency Ratio, f
CLK
/f
O
50:1
100:1
The
●
denotes specifications which apply over the full operating temperature
range,otherwise specifications are at T
A
= 25°C. (Complete Filter) V
S
=
±5V,
TTL Clock Input Level, unless otherwise specified.
CONDITIONS
MIN
TYP
0.1 to 20k
< f
CLK
< f
CLK
/2
MAX
UNITS
Hz
Hz
Hz
LTC1164A
LTC1164
LTC1164A
LTC1164
Clock-to-Center Frequency Ratio,
Side to Side Matching
LTC1164A
LTC1164
Q Accuracy
Sides A, B, C: Mode 1, R1 = R3 = 50k,
R2 = 5k,
Side D: Mode 3, R1 = R3 = 50k,
R2 = R4 = 5k
f
O
= 5kHz, Q = 10
50:1, f
CLK
= 250kHz
50:1, f
CLK
= 250kHz
100:1, f
CLK
= 500kHz
100:1, f
CLK
= 500kHz
Sides A, B, C, Mode 1, f
O
= 5kHz, Q = 10
Side D Mode 3, f
O
= 5kHz, Q = 10
50:1, f
CLK
= 250kHz
50:1, f
CLK
= 250kHz
Sides A, B, C, Mode 1, f
O
= 5kHz, Q = 10
50:1, f
CLK
= 250kHz
100:1, f
CLK
= 500kHz
Side D Mode 3, f
O
= 5kHz, Q = 10
50:1, f
CLK
= 250kHz
100:1, f
CLK
= 500kHz
●
●
●
●
50
±0.5
50
±0.9
100
±0.5
100
±0.9
%
%
%
%
●
●
●
●
●
●
0.5
1.0
±2
±2
±3
±6
±1
±5
1.5
1.0
500
200
±5
±5
±6
±12
%
%
%
%
%
%
ppm/°C
ppm/°C
MHz
MHz
kHz
µV
RMS
f
O
Temperature Coefficient
Q Temperature Coefficient
Maximum Clock Frequency
f
CLK
≤
500kHz
f
CLK
≤
250kHz
Mode 1, Q < 2.5
V
S
≥
±7.0V,
50:1 or 100:1
Mode 3, Q < 5
V
S
≥
±5V,
50:1 or 100:1
Mode 3, Q < 5
V
S
=
±2.5V,
50:1 or 100:1
f
CLK
Feedthrough
DC Offset Voltages
(See Figure 1 and Table 1)
Power Supply Current
f
CLK
≤
500kHz, V
S
=
±5V
V
OS1
V
OS2
V
OS3
V
S
=
±2.5V
V
S
=
±5V,
Temp
≥
25°C
V
S
=
±5V
V
S
=
±7.5V,
Temp
≥
25°C
V
S
=
±7.5V
●
●
●
●
●
2
3
3
4
3.6
5.6
6
9
20
45
45
5
8
8
11
mV
mV
mV
mA
mA
mA
mA
mA
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note: 2:
Guaranteed by design. Not tested.
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3
LTC1164
ELECTRICAL CHARACTERISTICS
(11, 14, 23)
(12, 13, 24)
1
V
OS1
2
(10, 15, 22)
3
V
OS2
(9, 16, 21)
4
+
–
–
+
+
Σ
–
+
–
–
+
+
V
OS3
–
–
+
5 (8, 20)
6
LTC1164 • BD01
Figure 1. Equivalent Input Offsets of 1/4 LTC1164 Filter Building Block
Table 1. Output DC Offsets One 2nd Order Section
MODE
1
1b
2
3
V
OSN
PIN 2, 11, 14, 23
V
OS1
[(1/Q) + 1 + ||H
OLP
||] – V
0S3
/Q
V
OS1
[(1/Q) + 1 + R2/R1] – V
0S3
/Q
[V
OS1
(1 + R2/R1 + R2/R3 + R2/R4) – V
0S3
(R2/R3)] •
[R4/(R2 + R4)] + V
0S2
[R2/(R2 + R4)]
V
0S2
V
OSBP
PINS 3, 10, 15, 22
V
OS3
V
OS3
V
OS3
V
OS3
V
OSN
– V
OS2
~ (V
OSN
– V
OS2
) (1 + R5/R6)
V
OSN
– V
OS2
V
OSLP
PINS 4, 9, 16, 21
V
OS1
1 +
–V
OS3
R4
[
R4
R1
+
R4
R2
+
R4
R3
]
– V
OS2
(
R2
)
R4
(
R3
)
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LTC1164
BLOCK DIAGRA
W
HPA/NA(11)
BPA(10)
LPA(9)
V
+
(7)
INV A(12)
–
+
+
Σ
–
+
∫
+
∫
50/100(17)
AGND(6)
CLK(18)
HPB/NB(2)
SA(8)
BPB(3)
LPB(4)
V
–
(19)
INV B(1)
–
+
+
Σ
–
+
∫
+
∫
HPC/NC(23)
SB(5)
INV C(24)
BPC(22)
LPC(21)
–
+
+
Σ
–
+
∫
+
∫
HPD(14)
SC(20)
BPD(15)
LPD(16)
BY TYING PIN 17 TO V
+
ALL SECTIONS
OPERATE WITH (f
CLK
/f
O
) = (50:1)
BY TYING PIN 17 TO V
–
ALL SECTIONS
OPERATE WITH (f
CLK
/f
O
) = (100:1)
BY TYING PIN 17 TO AGND SECTIONS A & D
OPERATE WITH (f
CLK
/f
O
) = (100:1) AND
SECTIONS B & C OPERATE AT (50:1)
LTC1164 • BD02
INV D(13)
–
+
∫
+
∫
+
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