AN4570
Application note
Using the high-density STM32F30xxD/E FMC peripheral to drive
external memories
Introduction
This application note describes how to use the high-density STM32F30xxD/E FMC (flexible
memory controller) peripheral to drive a set of external memories. For that aim, it gives an
overview of the STM32F30xxD/E FMC. The document also presents memory interfacing
examples that include the typical FMC configuration, the timing computation method and the
hardware connection.
This application note considers a 16-bit asynchronous NOR Flash memory, an 8-bit NAND
Flash memory and a 16-bit asynchronous SRAM.
The STM32F30xxD/E firmware library and the different memory drivers corresponding to
the memory types presented in this application note are available for download on
STMicroelectronics website at
www.st.com.
Table 1
provides the list of products to which this application note applies.
Table 1. Applicable products
Reference
Part number
STM32F302RD, STM32F302VD, STM32F302ZD,
STM32F302RE, STM32F302VE, STM32F302ZE,
STM32F303RD, STM32F303VD, STM32F303ZD,
STM32F303RE, STM32F303VE, STM32F303ZE.
STM32F30xxD/E
January 2015
DocID026804 Rev 1
1/46
www.st.com
1
Contents
AN4570
Contents
1
Overview of the STM32F30xxD/E flexible static memory controller . . 5
1.1
Interfacing asynchronous static memories (NOR Flash, SRAM) . . . . . . . . 7
2
Interfacing with a non-multiplexed, asynchronous
16-bit NOR Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1
2.2
2.3
FMC configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1.1
Typical use of the FMC to interface with a NOR Flash memory . . . . . . 10
Timing computation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Hardware connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3
Interfacing with a non-multiplexed, asynchronous 16-bit SRAM . . . . 22
3.1
3.2
3.3
FMC configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1.1
Typical use of the FMC to interface with an SRAM . . . . . . . . . . . . . . . . 23
Timing computation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Hardware connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4
Interfacing with an 8-bit NAND Flash memory . . . . . . . . . . . . . . . . . . . 30
4.1
4.2
4.3
4.4
FMC configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.1.1
Typical use of the FMC to interface with a NAND memory . . . . . . . . . . 32
Timing computation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Hardware connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Error correction code computation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.4.1
4.4.2
Error correction code (ECC) computation overview . . . . . . . . . . . . . . . 41
Error detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
5
STM32F30xxD/E FMC configuration in 100-pin packages . . . . . . . . . . 43
5.1
5.2
Interfacing the FMC with a NAND Flash memory . . . . . . . . . . . . . . . . . . 43
Interfacing the FMC with a NOR Flash memory . . . . . . . . . . . . . . . . . . . . 44
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
2/46
DocID026804 Rev 1
AN4570
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Applicable products. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
FMC operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
STM32F30xxD/E FMC asynchronous timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
NOR Flash memory timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
M29W128FL signal to FMC pin correspondence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IS61WV51216BL SRAM timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
IS61WV51216BLL signal to FMC pin correspondence. . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
NAND512W3A2C Flash memory timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
NAND512W3A signal to FMC pin correspondence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
NAND Flash memory connection to the FMC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
NOR Flash memory connection to the FMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
DocID026804 Rev 1
3/46
3
List of figures
AN4570
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
FMC block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
FMC memory banks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Asynchronous NOR Flash read access timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Asynchronous NOR Flash write access timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
16-bit NOR Flash: M29W128FL/GL connection to STM32F30xxD/E . . . . . . . . . . . . . . . . . 14
SRAM asynchronous read access timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
SRAM asynchronous write access timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
16-bit SRAM: IS61WV51216BLL connection to STM32F30xxD/E . . . . . . . . . . . . . . . . . . . 25
FMC NAND bank sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
NAND memory access timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
8-bit NAND Flash: NAND512W3A2C/NAND512W3A2B connection to STM32F30xxD/E . 36
Error detection flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4/46
DocID026804 Rev 1
AN4570
Overview of the STM32F30xxD/E flexible static memory controller
1
Overview of the STM32F30xxD/E flexible static
memory controller
The FMC has the following main features:
•
Interface with static-memory mapped devices including:
–
Static random access memory (SRAM),
–
–
–
–
•
•
•
•
•
NOR Flash memory/OneNAND Flash memory,
PSRAM (4 memory banks),
16-bit PC Card compatible devices,
Two banks of NAND Flash memory with ECC hardware to check up to 8 Kbyte of
data
Supports burst mode access to synchronous devices (NOR Flash and PSRAM)
8- or 16-bit wide data bus
Independent chip select control for each memory bank
Independent configuration for each memory bank
Programmable timings to support a wide range of devices, in particular:
–
Programmable wait states (up to 15)
Programmable bus turnaround cycles (up to 15)
Programmable output enable and write enable delays (up to 15)
Independent read and write timings and protocol, so as to support the widest
variety of memories and timings
Write enable and byte lane select outputs for use with PSRAM and SRAM devices
Translation of 32-bit wide AHB transactions into consecutive 16-bit or 8-bit accesses to
external 16-bit or 8-bit devices
The FMC embeds two Write FIFOs:
–
Write Data FIFO with 16x33-bit depth,
–
Write Address FIFO with 16x30-bit depth).
External asynchronous wait control
–
–
–
•
•
•
•
The FMC registers that define the external device type and associated characteristics are
usually set at boot time and do not change until the next reset or power-up. However, it is
possible to change the settings at any time.
Figure 1
illustrates the FMC block diagram.
DocID026804 Rev 1
5/46
45
模拟电子
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
