LTC2923
Power Supply
Tracking Controller
FEATURES
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■
■
■
■
■
■
■
■
DESCRIPTIO
Flexible Power Supply Tracking
Tracks Both Up and Down
Power Supply Sequencing
Supply Stability is Not Affected
Controls Two Supplies Without Series FETs
Controls a Third Supply With a Series FET
Adjustable Ramp Rates
Electronic Circuit Breaker
Available in 10-Lead MS and 12-Lead
(4mm
×
3mm) DFN Packages
The LTC
®
2923 provides a simple solution to power supply
tracking and sequencing requirements. By selecting a few
resistors, the supplies can be configured to ramp-up and
ramp-down together or with voltage offsets, time delays
or different ramp rates.
By introducing currents into the feedback nodes of two
independent switching regulators, the LTC2923 causes
their outputs to track without inserting any pass element
losses. Because the currents are controlled in an open-
loop manner, the LTC2923 does not affect the transient
response or stability of the supplies. Furthermore, it
presents a high impedance when power-up is complete,
effectively removing it from the DC/DC circuit.
For systems that require a third supply, one supply can be
controlled with a series FET. This optional series FET can
also control a supply that does not allow direct access to
its feedback resistors (e.g., a power module) or a supply
whose output cannot be forced to ground (e.g., a 3-termi-
nal linear regulator). When the FET is used, an electronic
circuit breaker provides protection from short-circuit
conditions.
APPLICATIO S
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V
CORE
and V
I/O
Supply Tracking
Microprocessor, DSP and FPGA Supplies
Servers
Communication Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Patents Pending.
TYPICAL APPLICATIO
V
IN
3.3V
Q1
10nF
3.3V
1V/DIV
V
IN
IN
DC/DC
FB = 1.235V
16.5k
V
IN
TRACK1
13k
887k
TRACK2
412k
GND
887k
412k
2923 TA01
138k
100k
V
CC
ON
GATE
RAMP
FB1
OUT
1.8V
LTC2923
35.7k
RAMPBUF
STATUS
16.5k
SDO
FB2
3.3V
2.5V
1.8V
OUT
2.5V
IN
DC/DC
FB = 0.8V
U
3.3V
2.5V
1.8V
1ms/DIV
2923 TA02
U
U
1V/DIV
1ms/DIV
2923 F08b
2923fa
1
LTC2923
ABSOLUTE
AXI U
RATI GS
(Note 1)
Average Current
TRACK1, TRACK2 .............................................. 5mA
FB1, FB2 ............................................................ 5mA
RAMPBUF ......................................................... 5mA
Operating Temperature Range
LTC2923C ............................................... 0°C to 70°C
LTC2923I ............................................ – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MS Package .................................................... 300°C
Supply Voltage (V
CC
) ................................ – 0.3V to 10V
Input Voltages
ON ........................................................ – 0.3V to 10V
TRACK1, TRACK2 ...................... – 0.3V to V
CC
+ 0.3V
RAMP ........................................... – 0.3V to V
CC
+ 1V
Output Voltages
FB1, FB2, SDO, STATUS ........................– 0.3V to 10V
RAMPBUF ................................. – 0.3V to V
CC
+ 0.3V
GATE (Note 2) ................................... – 0.3V to 11.5V
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
V
CC
ON
TRACK1
TRACK2
RAMPBUF
1
2
3
4
5
10
9
8
7
6
RAMP
GATE
FB1
FB2
GND
LTC2923CMS
LTC2923IMS
MS PART
MARKING
LTAED
LTAEE
MS PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 120°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
CC
I
CC
PARAMETER
Input Supply Range
Input Supply Current
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. 2.9V < V
CC
< 5.5V unless otherwise noted (Note 3).
CONDITIONS
●
V
CC(UVL)
∆V
CC(UVLHYST)
∆V
GATE
I
GATE
Input Supply Undervoltage Lockout
Input Supply Undervoltage Lockout Hysteresis
External N-Channel Gate Drive (V
GATE
– V
CC
)
GATE Pin Current
V
ON(TH)
∆V
ON(HYST)
ON Pin Threshold Voltage
ON Pin Hysteresis
2
U
U
W
W W
U
W
TOP VIEW
V
CC
ON
TRACK1
TRACK2
RAMPBUF
GND
1
2
3
13
4
5
6
9
8
7
SDO
FB1
FB2
12 RAMP
11 GATE
10 STATUS
ORDER PART
NUMBER
LTC2923CDE
LTC2923IDE
DE PART
MARKING
2923
DE12 PACKAGE
12-LEAD (4mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 13) INTERNALLY CONNECTED TO GND
(PCB CONNECTION OPTIONAL)
MIN
2.9
5
2.2
5
–7
7
5
1.212
30
●
●
●
●
●
●
●
●
●
TYP
1.3
7
2.5
25
5.5
–10
10
20
1.230
75
MAX
5.5
3
10
2.7
6
–13
13
50
1.248
150
UNITS
V
mA
mA
V
mV
V
µA
µA
mA
V
mV
2923fa
I
FBx
= 0, I
TRACKx
= 0
I
FBx
= –1mA, I
TRACKx
= –1mA,
I
RAMPBUF
= –2mA
V
CC
Rising
I
GATE
= –1µA
Gate On, V
GATE
= 0V, No Faults
Gate Off, V
GATE
= 5V, No Faults
Gate Off, V
GATE
= 5V,
Short-Circuit Fault
V
ON
Rising
LTC2923
ELECTRICAL CHARACTERISTICS
SYMBOL
V
ON(FC)
I
ON
∆V
DS(TH)
I
RAMP
V
RAMPBUF(OL)
V
RAMPBUF(OH)
V
OS
I
ERROR(%)
V
TRACKx
I
FB(LEAK)
V
FB(CLAMP)
V
SDO(OL)
V
STATUS(OL)
t
PSC
PARAMETER
ON Pin Fault Clear Threshold Voltage
ON Pin Input Current
FET Drain-Source Overcurrent Voltage Threshold
(V
CC
– V
RAMP
)
RAMP Pin Input Current
RAMPBUF Low Voltage
RAMPBUF High Voltage (V
CC
– V
RAMPBUF
)
Ramp Buffer Offset (V
RAMPBUF
– V
RAMP
)
I
FBx
to I
TRACKx
Current Mismatch
I
ERROR(%)
= (I
FBx
– I
TRACKx
)/I
TRACKx
TRACK Pin Voltage
I
FB
Leakage Current
V
FB
Clamp Voltage
SDO Output Low Voltage
STATUS Output Low Voltage
Short-Circuit Propagation Delay V
DS
High
to GATE Low
0V < RAMP < V
CC
, V
CC
= 5.5V
I
RAMPBUF
= 2mA
I
RAMPBUF
= –2mA
V
RAMPBUF
= V
CC
/2, I
RAMPBUF
= 0A
I
TRACKx
= –10µA
I
TRACKx
= –1mA
I
TRACKx
= –10µA
I
TRACKx
= –1mA
V
FB
= 1.5V, V
CC
= 5.5V
1µA < I
FB
< 1mA
I
SDO
= 3mA
I
STATUS
= 3mA
V
DS
= V
CC
, V
CC
= 2.9V
●
●
●
●
●
●
●
●
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. 2.9V < V
CC
< 5.5V unless otherwise noted (Note 3).
CONDITIONS
●
MIN
0.3
160
●
●
●
●
●
TYP
0.4
0
200
0
90
100
MAX
0.5
±100
240
±1
150
200
30
±5
±5
0.824
0.824
±100
2
0.4
0.4
20
UNITS
V
nA
mV
µA
mV
mV
mV
%
%
V
V
nA
V
V
V
µs
V
ON
= 1.2V, V
CC
= 5.5V
–30
0
0
0
0.776
0.776
1.5
0.8
0.8
±1
1.7
0.2
0.2
10
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The GATE pin is internally limited to a minimum of 11.5V. Driving
this pin to voltages beyond the clamp may damage the part.
Note 3:
All currents into the device pins are positive; all currents out of
device pins are negative. All voltages are referenced to ground unless
otherwise specified.
TYPICAL PERFOR A CE CHARACTERISTICS
Specifications are at T
A
= 25°C unless otherwise noted.
V
GATE
vs V
CC
12
11
V
CC
= 2.9V
10
I
GATE
(mA)
V
GATE
(V)
V
GATE
(V)
9
8
2
3
4
V
CC
(V)
5
6
2923 G01
U W
V
GATE
vs I
GATE
15
30
25
I
GATE
vs V
CC
Fast Pull-Down
V
GATE
= 5V
V
CC
= 5.5V
10
20
15
10
5
5
0
0
5
I
GATE
(µA)
2923 G02
10
0
15
0
1
2
3
V
CC
(V)
4
5
6
2923 G03
2923fa
3
LTC2923
PI FU CTIO S
V
CC
(Pin 1):
Positive Supply Input Pin. The operating
supply input range is 2.9V to 5.5V. An undervoltage
lockout circuit resets the part when the supply is below
2.5V. V
CC
should be bypassed to GND with a 0.1µF
capacitor.
ON (Pin 2):
On Control Input. The ON pin has a threshold
of 1.23V with 75mV of hysteresis. An active high will cause
10µA to flow from the GATE pin, ramping up the supplies.
An active low pulls 10µA from the GATE pin, ramping the
supplies down. Pulling the ON pin below 0.4V resets the
electronic circuit breaker in the LTC2923. If a resistive
divider connected to V
CC
drives the ON pin, the supplies
will automatically start up when V
CC
is fully powered.
TRACK1, TRACK2 (Pins 3, 4):
Tracking Control Input. A
resistive voltage divider between RAMPBUF and TRACKx
determines the tracking profile of a slave supply (see
Applications Information). TRACKx pulls up to 0.8V and
the current supplied at TRACKx is mirrored at FBx. TRACKx
is capable of supplying at least 1mA when V
CC
= 2.9V.
Because a TRACKx pin is capable of supplying up to 30mA
under short-circuit conditions, avoid connecting TRACKx
to GND for extended periods. Limit the capacitance at each
TRACKx pin to less than 25pF. Float the TRACKx pins if
unused.
RAMPBUF (Pin 5):
Ramp Buffer Output. Provides a low
impedance buffered version of the signal on the RAMP pin.
This buffered output drives the resistive dividers that
connect to the TRACKx pins. Limit the capacitance at the
RAMPBUF pin to less than 100pF.
GND (Pins 6, 13):
Circuit Ground.
FB1, FB2 (Pins 8, 7):
Feedback Control Output. FBx pulls
up on the feedback node of slave supplies. Tracking is
achieved by mirroring the current from TRACKx into FBx.
If the appropriate resistive divider connects RAMPBUF
and TRACKx, the FBx current will force OUTx to track
RAMP. To prevent damage to the slave supply, the FBx pin
will not force the slave’s feedback node above 1.7V. In
addition, it will not actively sink current from this node
even when the LTC2923 is unpowered. Float the FB pins if
unused.
U
U
U
MS/DE Packages
GATE (Pin 9/Pin 11):
Gate Drive for External N-Channel
FET. When the ON pin is high, an internal 10µA current
source charges the gate of the external N-channel MOS-
FET. A capacitor connected from GATE to GND sets the
ramp rate. An internal charge pump guarantees that GATE
will pull up to 5V above V
CC
ensuring that logic level
N-channel FETs are fully enhanced. When the ON pin is
pulled low, the GATE pin is pulled to GND with a 10µA
current source. Under a short-circuit condition, the elec-
tronic circuit breaker in the LTC2923 pulls the GATE low
immediately with 20mA. Tie GATE to GND if unused. It is
a good practice to add a 10Ω resistor between this
capacitor and the FET’s gate to prevent high frequency FET
oscillations.
RAMP (Pin 10/Pin 12):
Ramp Buffer Input. When the
RAMP pin is connected to the source of the external
N-channel FET, the slave supplies track the FET’s source
as it ramps up and down. If the GATE is fully enhanced
(GATE > RAMP + 4.9V) and (V
CC
– RAMP > 200mV)
indicates a shorted output, then the electronic circuit
breaker trips and GATE quickly pulls low with 20mA. The
GATE will not ramp up again until ON is pulled below 0.4V
and then above 1.23V. Alternatively, when no external FET
is used, the RAMP pin can be tied directly to the GATE pin.
In this configuration, the supplies track the capacitor on
the GATE pin as it is charged and discharged by the 10µA
current source controlled by the ON pin. RAMP must not
be driven above V
CC
(except by the GATE pin).
SDO (Pin 9, DE Package Only):
Slave Supply Shutdown
Output. SDO is an open-drain output that holds the shut-
down (RUN/SS) pins of the slave supplies low until the ON
pin is pulled above 1.23V. If the slave supply is capable of
operating with an input supply that is lower than the
LTC2923’s minimum operating voltage of 2.9V, the SDO
pin can be used to hold off the slave supplies. SDO will be
pulled low again when RAMP < 100mV and ON < 1.23V.
STATUS (Pin 10, DE Package Only):
Power Good Status
Indicator. The STATUS pin is an open-drain output that
pulls low until GATE has been fully charged at which time
all supplies will have reached their final operating voltage.
2923fa
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