Datasheet> 器件分类 > 嵌入式处理器和控制器> 微控制器和处理器> 89HPES12N3A1ZCBCGI

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89HPES12N3A1ZCBCGI: 产品描述PCI Bus Controller, PBGA324, 19 X 19 MM, 1 MM PITCH, GREEN, CABGA-324; 产品类别嵌入式处理器和控制器微控制器和处理器; 文件大小45KB，共2页; 制造商IDT (Integrated Device Technology); 标准

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89HPES12N3A1ZCBCGI概述

PCI Bus Controller, PBGA324, 19 X 19 MM, 1 MM PITCH, GREEN, CABGA-324

89HPES12N3A1ZCBCGI规格参数

参数名称	属性值
是否无铅	不含铅
是否Rohs认证	符合
零件包装代码	BGA
包装说明	19 X 19 MM, 1 MM PITCH, GREEN, CABGA-324
针数	324
Reach Compliance Code	compli
ECCN代码	3A001.A.3
其他特性	ALSO REQUIRES 3.3V SUPPLY
地址总线宽度
总线兼容性	PCI
最大时钟频率	125 MHz
外部数据总线宽度
JESD-30 代码	S-PBGA-B324
JESD-609代码	e1
长度	19 mm
湿度敏感等级	3
端子数量	324
最高工作温度	85 °C
最低工作温度	-40 °C
封装主体材料	PLASTIC/EPOXY
封装代码	LBGA
封装等效代码	BGA324,18X18,40
封装形状	SQUARE
封装形式	GRID ARRAY, LOW PROFILE
峰值回流温度（摄氏度）	260
电源	1,3.3 V
认证状态	Not Qualified
座面最大高度	1.5 mm
最大供电电压	1.1 V
最小供电电压	0.9 V
标称供电电压	1 V
表面贴装	YES
技术	CMOS
温度等级	INDUSTRIAL
端子面层	Tin/Silver/Copper (Sn/Ag/Cu)
端子形式	BALL
端子节距	1 mm
端子位置	BOTTOM
处于峰值回流温度下的最长时间	30
宽度	19 mm
uPs/uCs/外围集成电路类型	BUS CONTROLLER, PCI
Base Number Matches	1

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12 Lane 3-Port

PCI Express® Switch

89HPES12N3A

Product Brief

Device Overview

The 89HPES12N3A, a 12 lane 3-port PCI Express® switch, is a

member of the IDT PRECISE™ family of PCI Express switching solu-

tions. The PES12N3A is a peripheral chip that performs PCI Express

Packet switching with a feature set optimized for high performance

applications such as servers and storage. It provides connectivity and

switching functions between a PCI Express upstream port and two

downstream ports or peer-to-peer switching between downstream ports.

The 89HPES12N3A offers an enhanced architecture and feature set

in a package that is pin-compatible with the first generation

89HPES12N3 12-lane, 3-port PCIe switch.

Features

◆

High Performance PCI Express Switch

– Twelve 2.5Gbps PCI Express lanes

– Three switch ports

– Upstream port configurable up to x4

– Downstream ports configurable up to x4

– Low-latency cut-through switch architecture

– Support for Max Payload Sizes up to 2048 bytes

– One virtual channel

– Eight traffic classes

– PCI Express Base Specification Revision 1.1 compliant

Flexible Architecture with Numerous Configuration Options

– Automatic per port link width negotiation to x4, x2 or x1

– Automatic lane reversal on all ports

– Automatic polarity inversion on all lanes

– Ability to load device configuration from serial EEPROM

◆

Legacy Support

– PCI compatible INTx emulation

– Bus locking

◆

Highly Integrated Solution

– Requires no external components

– Incorporates on-chip internal memory for packet buffering and

queueing

– Integrates twelve 2.5 Gbps embedded SerDes with 8B/10B

encoder/decoder (no separate transceivers needed)

◆

Reliability, Availability, and Serviceability (RAS) Features

– Supports ECRC and Advanced Error Reporting

– Internal end-to-end parity protection on all TLPs ensures data

integrity even in systems that do not implement end-to-end

CRC (ECRC)

– Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O

– Compatible with Hot-Plug I/O expanders used on PC and

server motherboards

◆

Block Diagram

3-Port Switch Core

Frame Buffer

Route Table

Port

Arbitration

Scheduler

Transaction Layer

Data Link Layer

Multiplexer/Demultiplexer

Phy

Logical

Layer

Phy

Logical

Layer

Phy

Logical

Layer

Phy

Logical

Layer

Transaction Layer

Data Link Layer

Multiplexer/Demultiplexer

Phy

Logical

Layer

Phy

Logical

Layer

Phy

Logical

Layer

Phy

Logical

Layer

Transaction Layer

Data Link Layer

Multiplexer/Demultiplexer

Phy

Logical

Layer

Phy

Logical

Layer

Phy

Logical

Layer

Phy

Logical

Layer

SerDes SerDes SerDes SerDes

SerDes

SerDes SerDes

SerDes

SerDes SerDes SerDes SerDes

12 PCI Express Lanes

One x4 Upstream Port and Two x4 Downstream Ports

Figure 1 Internal Block Diagram

IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.

1 of 2

2007 Integrated Device Technology, Inc.

February 8, 2007

89HPES12N3A1ZCBCGI相似产品对比

	89HPES12N3A1ZCBCGI	89HPES12N3A1ZCBCI	89HPES12N3A1ZCBC	89HPES12N3AZCBCI
描述	PCI Bus Controller, PBGA324, 19 X 19 MM, 1 MM PITCH, GREEN, CABGA-324	PCI Bus Controller, PBGA324, 19 X 19 MM, 1 MM PITCH, CABGA-324	PCI Bus Controller, PBGA324, 19 X 19 MM, 1 MM PITCH, CABGA-324	PCI Bus Controller, PBGA324, 19 X 19 MM, 1 MM PITCH, CABGA-324
是否无铅	不含铅	含铅	含铅	含铅
是否Rohs认证	符合	不符合	不符合	不符合
零件包装代码	BGA	BGA	BGA	BGA
包装说明	19 X 19 MM, 1 MM PITCH, GREEN, CABGA-324	19 X 19 MM, 1 MM PITCH, CABGA-324	LBGA, BGA324,18X18,40	19 X 19 MM, 1 MM PITCH, CABGA-324
针数	324	324	324	324
Reach Compliance Code	compli	_compli	_compli	_compli
ECCN代码	3A001.A.3	3A001.A.3	3A001.A.3	EAR99
其他特性	ALSO REQUIRES 3.3V SUPPLY	ALSO REQUIRES 3.3V SUPPLY	ALSO REQUIRES 3.3V SUPPLY	ALSO REQUIRES 3.3V SUPPLY
总线兼容性	PCI	PCI	PCI	PCI
最大时钟频率	125 MHz	125 MHz	125 MHz	125 MHz
JESD-30 代码	S-PBGA-B324	S-PBGA-B324	S-PBGA-B324	S-PBGA-B324
JESD-609代码	e1	e0	e0	e0
长度	19 mm	19 mm	19 mm	19 mm
湿度敏感等级	3	3	3	3
端子数量	324	324	324	324
最高工作温度	85 °C	85 °C	70 °C	85 °C
最低工作温度	-40 °C	-40 °C	-	-40 °C
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	LBGA	LBGA	LBGA	LBGA
封装等效代码	BGA324,18X18,40	BGA324,18X18,40	BGA324,18X18,40	BGA324,18X18,40
封装形状	SQUARE	SQUARE	SQUARE	SQUARE
封装形式	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE
峰值回流温度（摄氏度）	260	225	225	225
电源	1,3.3 V	1,3.3 V	1,3.3 V	1,3.3 V
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	1.5 mm	1.5 mm	1.5 mm	1.5 mm
最大供电电压	1.1 V	1.1 V	1.1 V	1.1 V
最小供电电压	0.9 V	0.9 V	0.9 V	0.9 V
标称供电电压	1 V	1 V	1 V	1 V
表面贴装	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS
温度等级	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL
端子面层	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)
端子形式	BALL	BALL	BALL	BALL
端子节距	1 mm	1 mm	1 mm	1 mm
端子位置	BOTTOM	BOTTOM	BOTTOM	BOTTOM
处于峰值回流温度下的最长时间	30	20	20	20
宽度	19 mm	19 mm	19 mm	19 mm
uPs/uCs/外围集成电路类型	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI	BUS CONTROLLER, PCI
Base Number Matches	1	1	1	1

89HPES12N3A1ZCBCGI

89HPES12N3A1ZCBCGI概述

89HPES12N3A1ZCBCGI规格参数

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