PD - 97728A
IRFTS8342PbF
V
DS
V
GS
R
DS(on) max
(@V
GS
= 10V)
30
±20
19
29
4.8
8.2
V
V
'
HEXFET
®
Power MOSFET
'
m
m
'
'
R
DS(on) max
(@V
GS
= 4.5V)
*
6
TSOP-6
Q
g (typical)
I
D
(@T
A
= 25°C)
nC
A
Applications
System/Load Switch
Features and Benefits
Features
Industry-Standard TSOP-6 Package
RoHS Compliant Containing no Lead, no Bromide and no Halogen
MSL1, Consumer Qualification
Resulting Benefits
Multi-Vendor Compatibility
Environmentally Friendlier
Increased Reliability
Orderable part number
IRFTS8342TRPBF
Package Type
TSOP-6
Standard Pack
Form
Quantity
Tape and Reel
3000
Note
Absolute Maximum Ratings
Parameter
V
DS
V
GS
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
DM
P
D
@T
A
= 25°C
P
D
@T
A
= 70°C
T
J
T
STG
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Power Dissipation
Pulsed Drain Current
Max.
30
±20
8.2
6.6
80
2.0
1.3
0.02
-55 to + 150
Units
V
e
Power Dissipation
e
c
A
W
W/°C
°C
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Notes
through
are on page 2
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1
02/23/12
IRFTS8342PbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
BV
DSS
V
DSS
/T
J
R
DS(on)
V
GS(th)
V
GS(th)
I
DSS
I
GSS
gfs
Q
g
Q
gs
Q
gd
R
G
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
30
–––
–––
–––
1.35
–––
–––
–––
–––
–––
12
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
18
15
22
1.80
-5.7
–––
–––
–––
–––
–––
4.8
2.1
1.6
2.6
7.3
15
9.1
8.2
560
102
48
Max.
–––
–––
19
29
2.35
–––
1.0
150
100
-100
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Units
Conditions
V
GS
= 0V, I
D
= 250μA
V
mV/°C Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 8.2A
m
V
GS
= 4.5V, I
D
= 6.6A
d
d
V
mV/°C
μA
nA
S
nC
ns
V
DS
= V
GS
, I
D
= 25μA
V
DS
= 24V, V
GS
= 0V
V
DS
= 24V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
V
GS
= -20V
V
DS
= 10V, I
D
= 6.6A
V
GS
= 4.5V
V
DS
= 15V
I
D
= 6.6A
V
DD
= 15V, V
GS
= 4.5V
I
D
= 6.6.A
R
G
= 6.8
V
GS
= 0V
eÃ
pF
V
DS
= 25V
ƒ = 1.0MHz
Diode Characteristics
Parameter
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
8.2
4.5
Max.
2.5
Units
A
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
G
S
D
Ã
80
1.0
12
5.4
Typ.
–––
V
ns
nC
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
T
J
= 25°C, I
S
= 6.6A, V
GS
= 0V
T
J
= 25°C, I
F
= 6.6A, V
DD
= 24V
di/dt = 100/μs
d
Thermal Resistance
Parameter
R
JA
Junction-to-Ambient
d
e
Max.
62.5
Units
°C/W
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Pulse width
400μs; duty cycle
2%.
When mounted on 1 ich square copper board.
2
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IRFTS8342PbF
100
TOP
VGS
10V
8.0V
7.0V
4.5V
3.5V
3.0V
2.75V
2.5V
100
TOP
VGS
10V
8.0V
7.0V
4.5V
3.5V
3.0V
2.75V
2.5V
ID, Drain-to-Source Current (A)
10
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
1
2.5V
10
0.1
2.5V
60μs PULSE WIDTH
Tj = 25°C
0.01
0.01
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
1
0.1
1
60μs PULSE WIDTH
Tj = 150°C
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig 2.
Typical Output Characteristics
1.6
ID = 8.2A
1.4
ID, Drain-to-Source Current (A)
T J = 150°C
VGS = 10V
1.2
10
T J = 25°C
1.0
0.8
VDS = 15V
60μs
PULSE WIDTH
1.0
2
3
4
5
6
7
0.6
-60 -40 -20 0
20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
10000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
14.0
ID= 6.6A
VGS, Gate-to-Source Voltage (V)
12.0
10.0
8.0
6.0
4.0
2.0
0.0
C, Capacitance (pF)
VDS= 24V
VDS= 15V
1000
Ciss
Coss
VDS= 6.0V
100
Crss
10
1
10
VDS, Drain-to-Source Voltage (V)
100
0
2
4
6
8
10
12
14
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs.Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs.Gate-to-Source Voltage
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3
IRFTS8342PbF
100
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
T J = 150°C
10
100
1msec
10msec
1
10
T J = 25°C
1
0.1
VGS = 0V
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VSD, Source-to-Drain Voltage (V)
Tc = 25°C
Tj = 150°C
Single Pulse
0.01
0.1
1
DC
0.01
10
100
VDS, Drain-toSource Voltage (V)
Fig 7.
Typical Source-Drain Diode Forward Voltage
10
VGS(th) , Gate threshold Voltage (V)
Fig 8.
Maximum Safe Operating Area
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
ID = 25μA
ID = 250μA
ID = 1.0mA
8
ID, Drain Current (A)
6
4
2
0
25
50
75
100
125
150
T A , Ambient Temperature (°C)
-75 -50 -25
0
25
50
75 100 125 150
T J , Temperature ( °C )
Fig 9.
Maximum Drain Current vs.
Ambient Temperature
100
Thermal Response ( Z thJA ) °C/W
Fig 10.
Threshold Voltage vs. Temperature
D = 0.50
10
0.20
0.10
0.05
0.02
0.01
1
0.1
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + T A
0.001
0.01
0.1
1
10
100
0.001
1E-006
1E-005
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
4
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IRFTS8342PbF
RDS(on), Drain-to -Source On Resistance (m
)
ID = 8.2A
35
30
25
20
15
10
0
5
10
15
20
RDS(on), Drain-to -Source On Resistance ( m)
40
100
90
80
70
60
50
40
30
20
10
0
10
20
30
40
50
60
70
80
ID, Drain Current (A)
Vgs = 10V
Vgs = 4.5V
T J = 125°C
T J = 25°C
VGS, Gate -to -Source Voltage (V)
Fig 12.
On-Resistance vs. Gate Voltage
100
EAS , Single Pulse Avalanche Energy (mJ)
Fig 13.
Typical On-Resistance vs. Drain Current
1000
90
80
70
60
50
40
30
20
10
0
25
50
75
Single Pulse Power (W)
150
ID
TOP
0.96A
1.5A
BOTTOM 6.6A
800
600
400
200
100
125
0
1E-6
1E-5
1E-4
1E-3
Time (sec)
1E-2
1E-1
1E+0
Starting T J , Junction Temperature (°C)
Fig 14.
Maximum Avalanche Energy vs. Drain Current
Fig 15.
Typical Power vs. Time
Driver Gate Drive
D.U.T
+
P.W.
Period
D=
P.W.
Period
V
GS
=10V
-
+
Circuit Layout Considerations
Low Stray Inductance
Ground
Plane
Low
Leakage Inductance
Current Transformer
*
D.U.T. I
SD
Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V
DS
Waveform
Diode Recovery
dv/dt
-
-
+
R
G
dv/dt
controlled by R
G
Driver
same type as D.U.T.
I
SD
controlled by Duty Factor "D"
D.U.T.
- Device Under Test
V
DD
V
DD
+
-
Re-Applied
Voltage
Inductor Curent
Body Diode
Forward Drop
Ripple
5%
I
SD
*
V
GS
= 5V for Logic Level Devices
Fig 16.
Peak Diode Recovery dv/dt Test Circuit
for N-Channel
HEXFET
®
Power MOSFETs
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5