MGA-634P8
Ultra Low Noise, High Linearity Low Noise Amplifier
Data Sheet
Description
Avago Technologies’ MGA-634P8 is an economical, easy-
to-use GaAs MMIC Low Noise Amplifier (LNA). The LNA
has low noise and high linearity achieved through the
use of Avago Technologies’ proprietary 0.25um GaAs
Enhancement-mode pHEMT process. It is housed in a
miniature 2.0 x 2.0 x 0.75mm
3
8-pin Quad-Flat-Non-Lead
(QFN) package. It is designed for optimum use from 1.5
GHz up to 2.3 GHz. The compact footprint and low profile
coupled with low noise, high gain and high linearity make
the MGA-634P8 an ideal choice as a low noise amplifier for
cellular infrastructure for GSM and CDMA. For optimum
performance at lower frequency from 450MHz up to
1.5GHz, MGA-633P8 is recommended. For optimum per-
formance at higher frequency from 2.3GHz up to 4GHz,
MGA-635P8 is recommended. All these 3 products, MGA-
633P8, MGA-634P8 and MGA-635P8 share the same
package and pinout configuration.
Features
Ultra Low noise Figure
High linearity performance
GaAs E-pHEMT Technology
[1]
Low cost small package size: 2.0x2.0x0.75 mm
3
Excellent uniformity in product specifications
Tape-and-Reel packaging option available
Specifications
1.9 GHz; 5V, 48mA
17.4 dB Gain
0.44 dB Noise Figure
15.5 dB Input Return Loss
36 dBm Output IP3
21 dBm Output Power at 1dB gain compression
Pin Configuration and Package Marking
2.0 x 2.0 x 0.75 mm
3
8-lead QFN
[1]
[2]
[3]
[4]
Top View
Pin 1
Pin 2
Pin 3
Pin 4
– Vbias
– RFinput
– Not Used
– Not Used
[8]
[7]
[8]
[7]
[6]
[5]
Bottom View
Pin 5 – Not Used
Pin 6 – Not Used
Pin 7 – RFoutput/Vdd
Pin 8 – Not Used
Centre tab - Ground
[1]
[2]
[3]
[4]
Applications
Low noise amplifier for cellular infrastructure for GSM
TDS-CDMA, and CDMA.
Other ultra low noise application.
34X
[6]
[5]
Simplified Schematic
Vdd
Rbias
C5
C3
R1
R2
C6
C4
L1
[1]
L2
bias
[8]
[7]
[6]
[5]
Note:
Package marking provides orientation and identification
“34” = Device Code, where X is the month code.
RFin
C1
[2]
[3]
C2
RFout
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 70 V (Class A)
ESD Human Body Model = 500 V (Class 1B)
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
[4]
Notes:
The schematic is shown with the assumption that similar PCB is used
for all MGA-633P8, MGA-634P8 and MGA-635P8.
Detail of the components needed for this product is shown in Table 1.
Enhancement mode technology employs positive gate voltage,
thereby eliminating the need of negative gate voltage associated
with conventional depletion mode devices.
Good RF practice requires all unused pins to be earthed.
Absolute Maximum Rating
[1]
T
A
=25°C
Symbol
V
dd
V
bias
P
in,max
P
diss
T
j
T
stg
Thermal Resistance
Units
V
V
dBm
W
°C
°C
Parameter
Device Voltage,
RF output to ground
Gate Voltage
CW RF Input Power
(V
dd
= 5.0V, I
d
= 50 mA)
Total Power Dissipation
[2]
Junction Temperature
Storage Temperature
Absolute Maximum
5.5
0.7
+20
0.5
150
-65 to 150
Thermal Resistance
[3]
(V
dd
= 5.0V, I
dd
= 50mA)
jc
= 62°C/W
Notes:
1. Operation of this device in excess of any of
these limits may cause permanent damage.
2. Power dissipation with device turned on.
Board temperature T
B
is 25°C. Derate at
16mW/°C for T
B
>119°C.
3. Thermal resistance measured using Infra-Red
Measurement Technique
Electrical Specifications
[1], [4]
RF performance at T
A
= 25°C, V
dd
= 5V, R
bias
= 5.6 kOhm, 1.9 GHz, measured on demo board in Figure 1 with component
listed in Table 1 for 1.9 GHz matching.
Symbol
I
dd
Gain
OIP3
[2]
NF
[3]
OP1dB
IRL
ORL
REV ISOL
Parameter and Test Condition
Drain Current
Gain
Output Third Order Intercept Point
Noise Figure
Output Power at 1dB Gain Compression
Input Return Loss, 50 source
Output Return Loss, 50 load
Reverse Isolation
Units
mA
dB
dBm
dB
dBm
dB
dB
dB
Min.
37
16.1
33
Typ.
48
17.4
36
0.44
21
15.5
13
30
Max.
61
19.1
0.69
Notes:
1. Measurements at 1.9 GHz obtained using demo board described in Figure 1.
2. OIP3 test condition: F
RF1
= 1.9 GHz, F
RF2
= 1.901 GHz with input power of -10dBm per tone.
3. For NF data, board losses of the input have not been de-embedded.
4. Use proper bias, heatsink and derating to ensure maximum device temperature is not exceeded. See absolute maximum ratings and application
note for more details.
2
Product Consistency Distribution Charts
[1, 2]
LSL
Idd
Max: 61
Min: 37
Mean: 48
USL
Noise Figure
Max: 0.69
Mean: 0.44
USL
36 38 40 42 44 46 48 50 52 54 56 58 60 62
Figure 1. Idd @ 1.9GHz, 5V, 48mA Mean = 48
0.3
0.35
0.4
0.45
0.5
0.55
0.6
0.65
0.7
Figure 2. Noise Figure @1.9GHz, 5V, 48mA Mean = 0.44
LSL
OIP3
Min: 33
Mean: 36
LSL
Gain
Max: 19.1
Min: 16.1
Mean: 17.4
USL
33
34
35
36
37
16
16.5
17
17.5
18
18.5
19
Figure 3. OIP3 @ 1.9GHz, 5V, 48mA Mean = 36
Figure 4. Gain @1.9GHz, 5V, 48mA Mean = 17.4
Notes:
1. Distribution data samples are 500 samples taken from 3 different wafers. Future wafers allocated to this product may have nominal values anywhere
between the upper and lower limits.
2. Circuit Losses have not been de-embedded from the actual measurements.
3
Demo Board Layout
Demo Board Schematic
Vdd
C5 (4.7uF)
C3 (10pF)
Rbias
(5.6kOhm)
R1
(49.9 Ohm)
R2
(0 Ohm)
C6 (4.7uF)
C4 (10pF)
L1 (8.2nH)
[1]
L2 (8.2nH)
bias
[8]
[7]
[6]
[5]
RFin
C1 (1000pF)
[2]
[3]
[4]
C2 (1000pF)
Figure 5. Demo Board Layout Diagram
– Recommended PCB material is 10 mils Rogers RO4350.
– Suggested component values may vary according to layout and PCB material.
Figure 6. Demo Board Schematic Diagram
Table 1. Component list for 1.9 GHz matching
Part
C1, C2
L1
L2
C3, C4
C5, C6
R1
R2
Rbias
Size
0402
0402
0402
0402
0805
0402
0402
0402
Value
1000pF (Murata)
8.2nH (CoilCraft)
8.2nH (Toko)
10pF (Murata)
4.7uF (Murata)
49.9 Ohm (Rohm)
0 Ohm (Kamaya)
5.6 kohm (Rohm)
Detail Part Number
GRM155R71H102KA01E
0402CS-8N2XGLU
LLP1005-FH8N2C
GRM1555C1H100JZ01E
GRM21BR60J475KA11L
MCR01 MZS F 49R9
RMC1/16S-JPTH
MCR01 MZS J 562
Note:
C1, C2 are DC Blocking capacitors
L1 input match for NF
L2 output match for OIP3
C3, C4, C5, C6 are bypass capacitors
R1 is stabilizing resistor
Rbias is the biasing resistor
4
MGA-634P8 Typical Performance
RF performance at T
A
= 25°C, Vdd = 5V, Id = 50mA, measured using 50ohm input and output board, unless otherwise
stated. OIP3 test condition: F
RF1
= 1.9 GHz, F
RF2
= 1.901 GHz with input power of -10dBm per tone.
0.44
0.42
0.4
Fmin (dB)
0.38
0.36
0.34
0.32
0.3
40
50
55
Idd (mA)
70
80
Fmin (dB)
0.5
0.48
0.46
0.44
0.42
0.4
0.38
0.36
0.34
0.32
0.3
40
50
55
Idd (mA)
70
80
Figure 7. Fmin vs Idd at 5V at 1.9GHz.
Figure 8. Fmin vs Idd at 5V at 2GHz.
20
18
16
14
12
10
8
6
4
2
0
20
18
16
14
12
10
8
6
4
2
0
40
50
55
Idd(mA)
70
80
Gain(dB)
40
50
55
Idd(mA)
70
80
Figure 9. Gain vs Idd at 5V Tuned for Optimum OIP3 and Fmin at 1.9GHz.
Figure 10. Gain vs Idd at 5V Tuned for Optimum OIP3 and Fmin at 2GHz.
45
40
35
OIP3(dBm)
30
OIP3(dBm)
40
50
55
Idd(mA)
70
80
25
20
15
10
5
0
Gain(dB)
45
40
35
30
25
20
15
10
5
0
40
50
55
Idd(mA)
70
80
Figure 11. OIP3 vs Idd at 5V Tuned for Optimum OIP3 and Fmin at 1.9GHz.
Figure 12. OIP3 vs Idd at 5V Tuned for Optimum OIP3 and Fmin at 2GHz.
5
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