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AM28F010-70FC

产品描述128K X 8 FLASH 12V PROM, 150 ns, PQCC32
产品类别存储    存储   
文件大小262KB,共35页
制造商AMD(超微)
官网地址http://www.amd.com
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AM28F010-70FC概述

128K X 8 FLASH 12V PROM, 150 ns, PQCC32

AM28F010-70FC规格参数

参数名称属性值
是否Rohs认证不符合
零件包装代码TSOP
包装说明TSSOP, TSSOP32,.8,20
针数32
Reach Compliance Codeunknow
ECCN代码EAR99
最长访问时间70 ns
命令用户界面YES
数据轮询NO
耐久性10000 Write/Erase Cycles
JESD-30 代码R-PDSO-G32
JESD-609代码e0
长度18.4 mm
内存密度1048576 bi
内存集成电路类型FLASH
内存宽度8
功能数量1
端子数量32
字数131072 words
字数代码128000
工作模式ASYNCHRONOUS
最高工作温度70 °C
最低工作温度
组织128KX8
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP32,.8,20
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行PARALLEL
峰值回流温度(摄氏度)NOT SPECIFIED
电源5 V
编程电压12 V
认证状态Not Qualified
反向引出线YES
座面最大高度1.2 mm
最大待机电流0.0001 A
最大压摆率0.03 mA
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子面层Tin/Lead (Sn/Pb)
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
切换位NO
类型NOR TYPE
宽度8 mm
Base Number Matches1

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FINAL
Am28F010
1 Megabit (128 K x 8-Bit)
CMOS 12.0 Volt, Bulk Erase Flash Memory
DISTINCTIVE CHARACTERISTICS
s
High performance
— 70 ns maximum access time
s
CMOS Low power consumption
— 30 mA maximum active current
— 100 µA maximum standby current
— No data retention power consumption
s
Compatible with JEDEC-standard byte-wide
32-Pin EPROM pinouts
— 32-pin PDIP
— 32-pin PLCC
— 32-pin TSOP
s
10,000 write/erase cycles minimum
s
Write and erase voltage 12.0 V
±5%
s
Latch-up protected to 100 mA
from –1 V to V
CC
+1 V
s
Flasherase™ Electrical Bulk Chip-Erase
— One second typical chip-erase
s
Flashrite™ Programming
— 10 µs typical byte-program
— Two seconds typical chip program
s
Command register architecture for
microprocessor/microcontroller compatible
write interface
s
On-chip address and data latches
s
Advanced CMOS flash memory technology
— Low cost single transistor memory cell
s
Automatic write/erase pulse stop timer
GENERAL DESCRIPTION
The Am28F010 is a 1 Megabit Flash memory orga-
nized as 128 Kbytes of 8 bits each. AMD’s Flash mem-
ories offer the most cost-effective and reliable read/
write non-volatile random access memor y. The
Am28F010 is packaged in 32-pin PDIP, PLCC, and
TSOP versions. It is designed to be reprogrammed
and erased in-system or in standard EPROM pro-
grammers. The Am28F010 is erased when shipped
from the factory.
The standard Am28F010 offers access times as fast as
70 ns, allowing operation of high-speed microproces-
sors without wait states. To eliminate bus contention,
the Am28F010 has separate chip enable (CE#) and
output enable (OE#) controls.
AMD’s Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
Am28F010 uses a command register to manage this
functionality, while maintaining a JEDEC Flash Stan-
dard 32-pin pinout. The command register allows for
100% TTL level control inputs and fixed power supply
levels during erase and programming, while maintain-
ing maximum EPROM compatibility.
AMD’s Flash technology reliably stores memory con-
tents even after 10,000 erase and program cycles. The
AMD cell is designed to optimize the erase and pro-
gramming mechanisms. In addition, the combination of
advanced tunnel oxide processing and low internal
electric fields for erase and programming operations
produces reliable cycling. The Am28F010 uses a
12.0 V
±
5% V
PP
high voltage input to perform the
Flasherase and Flashrite algorithms.
The highest degree of latch-up protection is achieved
with AMD’s proprietary non-epi process. Latch-up pro-
tection is provided for stresses up to 100 milliamps on
address and data pins from –1 V to V
CC
+1 V.
The Am28F010 is byte programmable using 10 ms pro-
gramming pulses in accordance with AMD’s Flashrite
programming algorithm. The typical room temperature
programming time of the Am28F010 is two seconds.
The entire chip is bulk erased using 10 ms erase pulses
according to AMD’s Flasherase alrogithm. Typical era-
sure at room temperature is accomplished in less than
one second. The windowed package and the 15–20
Publication#
11559
Rev:
H
Amendment/+2
Issue Date:
January 1998
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