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IDT7381L65GB

产品描述Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CAVITY-UP, PGA-68
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小72KB,共7页
制造商IDT (Integrated Device Technology)
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IDT7381L65GB概述

Bit-Slice Processor, 16-Bit, CMOS, CPGA68, CAVITY-UP, PGA-68

IDT7381L65GB规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称IDT (Integrated Device Technology)
零件包装代码PGA
包装说明CAVITY-UP, PGA-68
针数68
Reach Compliance Codenot_compliant
ECCN代码3A001.A.2.C
其他特性2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ
最大时钟频率19.23 MHz
外部数据总线宽度16
JESD-30 代码S-CPGA-P68
JESD-609代码e0
长度29.464 mm
端子数量68
最高工作温度125 °C
最低工作温度-55 °C
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码PGA
封装形状SQUARE
封装形式GRID ARRAY
峰值回流温度(摄氏度)NOT SPECIFIED
认证状态Not Qualified
座面最大高度5.207 mm
最大压摆率90 mA
最大供电电压5.5 V
最小供电电压4.5 V
标称供电电压5 V
表面贴装NO
技术CMOS
温度等级MILITARY
端子面层Tin/Lead (Sn/Pb)
端子形式PIN/PEG
端子节距2.54 mm
端子位置PERPENDICULAR
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度29.464 mm
uPs/uCs/外围集成电路类型BIT-SLICE MICROPROCESSOR

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HIGH-SPEED
4K x 9 DUAL-PORT
STATIC RAM
Integrated Device Technology, Inc.
IDT7014S
FEATURES:
• True Dual-Ported memory cells which allow simultaneous
access of the same memory location
• High-speed access
— Military: 20/25/35ns (max.)
— Commercial: 12/15/20/25ns (max.)
• Low-power operation
— IDT7014S
Active: 900mW (typ.)
• Fully asynchronous operation from either port
• TTL-compatible; single 5V (±10%) power supply
• Available in 52-pin PLCC and a 64-pin TQFP
• Industrial temperature range (–40°C to +85°C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT7014 is an extremely high-speed 4K x 9 Dual-Port
Static RAM designed to be used in systems where on-chip
hardware port arbitration is not needed. This part lends itself
to high-speed applications which do not need on-chip arbitra-
tion to manage simultaneous access.
The IDT7014 provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. See functional description.
The IDT7014 utilitizes a 9-bit wide data path to allow for
parity at the user's option. This feature is especially useful in
data communication applications where it is necessary to use
a parity bit for transmission/reception error checking.
Fabricated using IDT’s high-performance technology, the
IDT7014 Dual-Ports typically operate on only 900mW of
power at maximum access times as fast as 12ns.
The IDT7014 is packaged in a 52-pin PLCC and a 64-pin
thin plastic quad flatpack (TQFP).
FUNCTIONAL BLOCK DIAGRAM
R/
W
L
R/
W
R
OE
L
I/O
0L
- I/O
8L
COLUMN
CONTROL
COLUMN
CONTROL
OE
R
I/O
0R
- I/O
8R
A
0L
- A
11L
LEFT SIDE
ADDRESS
DECODE
LOGIC
MEMORY
ARRAY
RIGHT SIDE
ADDRESS
DECODE
LOGIC
A
0R
- A
11R
2528 drw 01
The IDT logo is a registereed trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
OCTOBER 1996
DSC-2528/6
6.11
1

 
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