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S-90N0212SMA-TFG

产品描述Small Signal Field-Effect Transistor, 1A I(D), 20V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SOT-23, 3 PIN
产品类别分立半导体    晶体管   
文件大小283KB,共11页
制造商ABLIC
标准
下载文档 详细参数 全文预览

S-90N0212SMA-TFG概述

Small Signal Field-Effect Transistor, 1A I(D), 20V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, SOT-23, 3 PIN

S-90N0212SMA-TFG规格参数

参数名称属性值
是否Rohs认证符合
厂商名称ABLIC
零件包装代码SOT-23
包装说明SMALL OUTLINE, R-PDSO-G3
针数3
Reach Compliance Codeunknown
ECCN代码EAR99
配置SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压20 V
最大漏极电流 (ID)1 A
最大漏源导通电阻0.16 Ω
FET 技术METAL-OXIDE SEMICONDUCTOR
JESD-30 代码R-PDSO-G3
JESD-609代码e6
元件数量1
端子数量3
工作模式ENHANCEMENT MODE
封装主体材料PLASTIC/EPOXY
封装形状RECTANGULAR
封装形式SMALL OUTLINE
峰值回流温度(摄氏度)260
极性/信道类型N-CHANNEL
认证状态Not Qualified
表面贴装YES
端子面层TIN BISMUTH
端子形式GULL WING
端子位置DUAL
处于峰值回流温度下的最长时间10
晶体管应用SWITCHING
晶体管元件材料SILICON

S-90N0212SMA-TFG文档预览

Rev.3.0
_00
N-CHANNEL POWER MOS FET FOR SWITCHING
S-90N0212SMA
Features
Low on-state resistance:
Ultra high-speed switching
Operational voltage:
Built-in gate protection diode
Small package:
2.5 V drive available
SOT-23-3
Applications
Notebook PCs
Cellular and portable phones
On-board power supplies
Packages
SOT-23-3
(Package drawing code: MP003-A)
Item code
Item code
Delivery form
DI
SC
: S-90N0212SMA-TF
: Taping only
ON
TI
NU
Seiko Instruments Inc.
ED
PR
R
DS(on)1
= 0.1
Max. (V
GS
= 4.5 V, I
D
= 0.5 A)
R
DS(on)2
= 0.16
Max. (V
GS
= 2.5 V, I
D
= 0.5 A)
OD
UC
T
The S-90N0212SMA is an N-channel power MOS
FET that realizes a low on-state resistance and ultra
high-speed switching characteristics. It is suitable for
speeding up switching, enabling a high efficient set
and energy saving. A gate protection diode is built in
as a countermeasure for static electricity. Small
SOT-23-3 package realize high-density mounting.
This product can be driven directly by a 2.5 V power
source. If use this product in combination with SII
switching regulator products, you can get the highest
performance.
1
N-CHZNNEL POWER MOS FET FOR SWITCHING
S-90N0212SMA
Pin Configuration
SOT-23-3
Top view
3
Table 1
Pin No.
1
2
3
Symbol
G
S
D
Description
Gate pin
Source pin
Drain pin
Rev.3.0
_00
1
Figure 1
2
Equivalent Circuit
D (Drain)
G (Gate)
Gate
Protection
Diode
S (Source)
Figure 2
Absolute Maximum Ratings
ON
TI
NU
V
DSS
V
GSS
I
D
I
DP
I
DR
P
D
T
ch
T
stg
ED
Table 2
Symbol
Body
Diode
Caution The diode connected between the gate and source of the
transistor serves as a protector against electrostatic
discharge. Do not apply an electrostatic discharge to this
IC that exceeds the performance ratings of the built-in
gate protection diode.
And when this device actually used, an additional
protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this
device.
Item
Drain to source voltage
(When between gate and source short circuits)
Gate to source voltage
(When between drain and source short circuits)
Drain current (DC)
Drain current (Pulse)
Reverse drain current
*1, *2
Power dissipation
Channel temperature
Storage temperature
SC
PR
V
GS
= 0 V
V
DS
= 0 V
OD
UC
T
(Ta = 25°C unless otherwise specified)
Conditions
Ratings
Unit
20
±12
1
4
1
1.1
150
−55
to
+150
A
V
PW = 10
µs,
Duty Cycle≤1%
W
°C
2
Caution The absolute maximum ratings are rated values exceeding which the product could suffer
physical damage. These values must therefore not be exceeded under any conditions.
*1.
Mounted on a ceramics board (1225 mm
×
1 mm)
*2.
The allowable power dissipation differs depending on the mounting form.
2
Seiko Instruments Inc.
DI
Rev.3.0
_00
Electrical Characteristics
DC characteristics
N-CHANNEL POWER MOS FET FOR SWITCHING
S-90N0212SMA
Table 3
Item
Symbol
Forward transfer admittance
Body drain diode forward voltage
*1.
Effective during pulse test (600
µs).
Dynamic characteristics
*1
Table 4
Item
Symbol
Input capacitance
Output capacitance
Feedback capacitance
C
iss
C
oss
C
rss
DI
SC
ON
TI
NU
Seiko Instruments Inc.
ED
(Ta = 25°C unless otherwise specified)
Min.
Typ.
Max.
Conditions
Unit
V
DS
= 10 V, V
GS
= 0 V,
190
pF
f = 1 MHz
65
45
PR
OD
UC
T
Drain cut-off current
Gate to source leakage current
Gate to source cut-off voltage
*1
Drain to source on-state resistance
I
DSS
I
GSS
V
GS(off)
R
DS(on)1
R
DS(on)2
|Y
fs
|
V
f
(Ta = 25°C unless otherwise specified)
Min.
Typ.
Max.
Conditions
Unit
V
DS
= 20 V, V
GS
= 0 V
10
µA
V
GS
= ±12 V, V
DS
= 0 V
±10
I
D
= 1 mA, V
DS
= 10 V
0.7
1.4
V
I
D
= 0.5 A, V
GS
= 4.5 V
0.075
0.1
I
D
= 0.5 A, V
GS
= 2.5 V
0.12
0.16
I
D
= 0.5 A, V
DS
= 10 V
3.1
S
I
f
= 1 A, V
GS
= 0 V
0.8
1.1
V
3
N-CHZNNEL POWER MOS FET FOR SWITCHING
S-90N0212SMA
Switching characteristics
Table 5
Item
Symbol
Rev.3.0
_00
Turn-on delay time
Rise time
Turn-off delay time
Fall time
t
d(on)
t
r
t
d(off)
t
f
(Ta = 25°C unless otherwise specified)
Min.
Typ.
Max.
Conditions
Unit
V
GS
= 5 V, I
D
= 0.5 A,
10
ns
V
DD
= 10 V
30
50
25
D.U.T.
R
L
V
GS
Wave Form
0
10 %
PG.
V
DD
V
DS
Wave Form
0
τ
τ
= 10
µs
Duty Cycle
1 %
V
GS
0
V
DS
PR
t
d(on)
TI
NU
Thermal characteristics
ED
Figure 3
Table 6
(Ta = 25°C unless otherwise specified)
Min.
Typ.
Max.
Unit
107
°C/W
Item
Symbol
Thermal resistance
(Channel to ambience)
R
th(ch-a)
Conditions
Mounted on a ceramics board
2
(1225 mm
×
1 mm)
Precautions
SII claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
4
DI
SC
The application conditions for the input voltage, output voltage, and load current should not exceed the
allowable power dissipation after mounting.
ON
Seiko Instruments Inc.
OD
UC
T
90 %
V
GS
90 %
90 %
10 %
10 %
t
f
t
r
t
d(off)
Rev.3.0
_00
Typical Characteristics
N-CHANNEL POWER MOS FET FOR SWITCHING
S-90N0212SMA
DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE
Pulse test (600
µs),
Ta = 25°C
4.0
3.5
5.0 V
4.5 V
4.0 V
3.5 V
3.0 V
2.5 V
V
GS
= 2.0 V
DRAIN CURRENT vs. GATE TO SOURCE VOLTAGE
Pulse test (600
µs),
V
DS
= 10 V
4.0
3.5
Drain Current I
D
[A]
2.5
2.0
1.5
1.0
0.5
0
0
0.5
Drain Current I
D
[A]
3.0
3.0
2.5
2.0
1.5
1.0
0.5
0
125 °C
OD
UC
T
25 °C
0
1
1
V
GS
= 2.5 V
0.1
4.5 V
0.01
0
1
2
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–50
0
50
–55 °C
1.5 V
1.0
1.5
2.0
2.5
3.0
2
3
Drain to Source Voltage V
DS
[V]
DRAIN TO SOURCE ON-STATE RESISTANCE
vs. GATE TO SOURCE VOLTAGE
Pulse test (600
µs),
Ta = 25°C
0.20
Gate to Source Voltage V
GS
[V]
Drain to Source On-State Resistance
R
DS(on)
[Ω]
0.15
1.0 A
0.10
I
D
= 0.5 A
0.05
0
0
2
ON
Drain to Source On-State Resistance
R
DS(on)
[Ω]
TI
NU
ED
PR
DRAIN TO SOURCE ON-STATE RESISTANCE
vs. DRAIN CURRENT
Pulse test (600
µs),
Ta = 25°C
4
6
8
10
3
4
Gate to Source Voltage V
GS
[V]
Drain Current I
D
[A]
GATE TO SOURCE CUT-OFF VOLTAGE VARIANCE
vs. AMBIENT TEMPERATURE
V
DS
= 10 V, I
D
= 1 mA
Gate to Source Cut-off Voltage Variance
V
GS(off)
Variance [V]
DRAIN TO SOURCE ON-STATE RESISTANCE
vs. AMBIENT TEMPERATURE
Pulse test (600
µs)
Drain to Source On-State Resistance
R
DS(on)
[Ω]
DI
V
GS
= 2.5 V
V
GS
= 4.5 V
0
25
50
0.20
SC
I
D
= 1.0 A
0.5 A
I
D
= 1.0 A
0.15
0.10
0.5 A
0.05
0
–50 –25
75
100 125 150
100
150
Ambient Temperature Ta [°C]
Ambient Temperature Ta [°C]
Seiko Instruments Inc.
5

 
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