PD-91860J
RADIATION HARDENED
POWER MOSFET
SURFACE MOUNT (SMD-2)
Product Summary
Part Number Radiation Level
IRHNA57160 100K Rads (Si)
IRHNA53160
IRHNA54160
300K Rads (Si)
500K Rads (Si)
R
DS(on)
0.012Ω
0.012Ω
0.012Ω
0.013Ω
IRHNA57160
JANSR2N7469U2
100V, N-CHANNEL
REF: MIL-PRF-19500/673
5
TECHNOLOGY
I
D
QPL Part Number
75A* JANSR2N7469U2
75A* JANSF2N7469U2
75A* JANSG2N7469U2
75A* JANSH2N7469U2
IRHNA58160 1000K Rads (Si)
TM
SMD-2
International Rectifier’s R5 technology provides
high performance power MOSFETs for space
applications. These devices have been characterized
for Single Event Effects (SEE) with useful performance
up to an LET of 80 (MeV/(mg/cm
2
)). The combination
of low R
DS(on)
and low gate charge reduces the
power losses in switching applications such as DC
to DC converters and motor control. These devices
retain all of the well established advantages of
MOSFETs such as voltage control, fast switching,
ease of paralleling and temperature stability of
electrical parameters.
Features:
n
n
n
n
n
n
n
n
n
Single Event Effect (SEE) Hardened
Ultra Low R
DS(on)
Low Total Gate Charge
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Surface Mount
Ceramic Package
Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 12V, TC = 25°C
ID @ VGS = 12V, TC = 100°C
IDM
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current
À
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Á
Avalanche Current
À
Repetitive Avalanche Energy
À
Peak Diode Recovery dv/dt
Â
Operating Junction
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
* Current is limited by package
For footnotes refer to the last page
300 (for 5s)
3.3 (Typical)
75*
69
300
250
2.0
±20
363
75
25
6.0
-55 to 150
Pre-Irradiation
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
o
C
g
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1
10/27/11
IRHNA57160, JANSR2N7469U2
Pre-Irradiation
Electrical Characteristics
@ Tj = 25°C (Unless Otherwise Specified)
Parameter
BVDSS
Drain-to-Source Breakdown Voltage
∆BV
DSS /∆T J Temperature Coefficient of Breakdown
Voltage
RDS(on)
Static Drain-to-Source On-State
Resistance
VGS(th)
Gate Threshold Voltage
g fs
Forward Transconductance
IDSS
Zero Gate Voltage Drain Current
Min
100
—
—
2.0
42
—
—
—
—
—
—
—
—
—
—
—
—
Typ Max Units
—
0.115
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.0
—
—
0.012
4.0
—
10
25
100
-100
160
55
65
35
125
75
50
—
V
V/°C
Ω
V
S
µA
Test Conditions
VGS = 0V, ID = 1.0mA
Reference to 25°C, I D = 1.0mA
VGS = 12V, ID = 69A
Ã
VDS = VGS, ID = 1.0mA
VDS
≥
15V, IDS = 69A
Ã
VDS = 80V ,VGS = 0V
VDS = 80V,
VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VGS =12V, ID = 45A
VDS = 50V
VDD = 50V, ID = 45A,
VGS =12V, RG = 2.35Ω
IGSS
IGSS
Qg
Q gs
Q gd
td
(on)
tr
td
(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
nA
nC
ns
nH
Measured from the center of
drain pad to center of source pad
VGS = 0V, VDS = 25V
f = 1.0MHz
Ciss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
6440
1660
60
—
—
—
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS
ISM
VSD
t rr
Q RR
ton
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode)
À
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min Typ Max Units
—
—
—
—
—
—
—
—
—
—
75*
300
1.2
300
2.2
Test Conditions
A
V
ns
µC
T
j
= 25°C, IS = 75A, VGS = 0V
Ã
Tj = 25°C, IF = 45A, di/dt
≤
100A/µs
VDD
≤
25V
Ã
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
* Current is limited by package
Thermal Resistance
Parameter
RthJC
RthJ-PCB
Junction-to-Case
Junction-to-PC board
Min Typ Max
—
—
—
1.6
0.5
—
Units
°C/W
Test Conditions
soldered to a 2 square copper-clad board
Note: Corresponding Spice and Saber models are available on International Rectifier Web site.
For footnotes refer to the last page
2
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Radiation Characteristics
IRHNA57160, JANSR2N7469U2
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation
ÄÅ
Parameter
BV
DSS
V
GS(th)
I
GSS
I
GSS
I
DSS
R
DS(on)
R
DS(on)
V
SD
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
Static Drain-to-Source
Ã
On-State Resistance (TO-3)
Static Drain-to-Source
Ã
On-State Resistance (SMD-2)
Diode Forward Voltage
Ã
Up to 500K Rads(Si)
1
1000K Rads (Si)
2
Units
Min
Max
Min
Max
100
2.0
—
—
—
—
—
—
—
4.0
100
-100
10
0.013
0.012
1.2
100
1.5
—
—
—
—
—
—
—
4.0
100
-100
25
0.014
0.013
1.2
V
nA
µA
Ω
Ω
V
Test Conditions
V
GS
= 0V, I
D
= 1.0mA
V
GS
= V
DS
, I
D
= 1.0mA
V
GS
= 20V
V
GS
= -20 V
V
DS
=80V, V
GS
=0V
V
GS
= 12V, I
D
= 45A
V
GS
= 12V, I
D
= 45A
V
GS
= 0V, IS = 45A
1. Part numbers IRHNA57160 (JANSR2N7469U2), IRHNA53160 (JANSF2N7469U2) and IRHNA54160 (JANSG2N7469U2)
2. Part number IRHNA58160 (JANSH2N7469U2)
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Typical Single Event Effect Safe Operating Area
LET
(MeV/(mg/cm ))
38 ± 5%
61 ± 5%
84 ± 5%
2
Energy
(MeV)
300 ± 7.5%
330 ± 7.5%
350 ± 10%
Range
(µm)
38 ± 7.5%
31 ± 10%
28 ± 7.5%
@VGS =
@VGS =
VDS (V)
@VGS =
@VGS =
@VGS =
0V
100
100
100
-5V
100
100
100
-10V
100
100
80
-15V
100
35
25
-20V
100
25
-
120
100
80
60
40
20
0
0
-5
-10
Bias VGS (V)
-15
-20
Bias VDS (V)
LET=38 ± 5%
LET=61 ± 5%
LET=84 ± 5%
Fig a.
Typical Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHNA57160, JANSR2N7469U2
Pre-Irradiation
1000
I
D
, Drain-to-Source Current (A)
100
I
D
, Drain-to-Source Current (A)
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM 5.0V
TOP
1000
100
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM 5.0V
TOP
5.0V
10
5.0V
10
1
0.1
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
1
0.1
20µs PULSE WIDTH
T
J
= 150
°
C
1
10
100
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
1000
2.0
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= 75A
I
D
, Drain-to-Source Current (A)
1.5
T
J
= 150
°
C
100
1.0
T
J
= 25
°
C
0.5
10
5.0
V DS = 50V
15
25V
20µs PULSE WIDTH
6.0
7.0
8.0
9.0
V
GS
, Gate-to-Source Voltage (V)
0.0
-60 -40 -20
V
GS
= 12V
0
20
40
60
80 100 120 140 160
T
J
, Junction Temperature(
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
4
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Pre-Irradiation
IRHNA57160, JANSR2N7469U2
10000
8000
V
GS
, Gate-to-Source Voltage (V)
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd ,
C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
20
I
D
=
45A
75A
16
V
DS
= 80V
V
DS
= 50V
V
DS
= 20V
C, Capacitance (pF)
Ciss
6000
12
4000
Coss
8
2000
4
Crss
0
1
10
100
0
0
40
80
FOR TEST CIRCUIT
SEE FIGURE 13
120
160
200
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
I
SD
, Reverse Drain Current (A)
ID, Drain-to-Source Current (A)
100
100
T
J
= 150
°
C
10
10
100µs
1ms
10ms
Tc = 25°C
Tj = 150°C
Single Pulse
1
10
100
DC
T
J
= 25
°
C
1
1
0.1
0.2
V
GS
= 0 V
0.6
1.0
1.4
1.8
0.1
V
SD
,Source-to-Drain Voltage (V)
1000
VDS , Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
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