FemtoClock
®
NG Crystal-to-3.3V, 2.5V
LVPECL/LVCMOS Clock Generator with
Fanout Buffer
General Description
The 8T49N012 is a high performance Clock Generator with
selectable LVPECL or Single-ended outputs. The 8T49N012 can
generate selectable frequencies from a crystal or a single-ended
reference clock. The frequency is selected from the Frequency
Selection Table.
Excellent phase noise performance is maintained with IDT’s Fourth
Generation FemtoClock
®
NG PLL technology.
8T49N012
DATA SHEET
Features
• Fourth Generation FemtoClock NG PLL technology
• Three differential output banks:
Bank A:
selectable between four pairs of LVPECL or four pairs
of complementary LVCMOS/LVTTL outputs
Bank B:
two pairs of LVPECL outputs
Bank C:
six pairs of LVPECL outputs
• Selectable clock input or crystal input.
• Supports 25MHz fundamental crystal or 25MHz, 50MHz,
66.67MHz clock input
• Selectable 156.25MHz, 125MHz, 100MHz clock for Bank B and
Bank C outputs
• Selectable 156.25MHz, 125MHz, 100MHz, 250MHz, 312.5MHz,
50MHz, 25MHz, 62.5MHz or 78.125MHz for Bank A outputs
• PLL lock indication (LVCMOS output)
• RMS phase jitter at 156.25MHz (12kHz - 20MHz): 0.199ps (typical)
• Power supply modes:
Core / Output
3.3V / 3.3V
3.3V / 2.5V
2.5V / 2.5V
nOE_C
Pin Assignment
nQA0_CMOS
nQA1_CMOS
nQA2_CMOS
nQA3_CMOS
QA0_CMOS
QA1_CMOS
QA2_CMOS
QA3_CMOS
V
CCO_A
V
CCO_A
• -40°C to 85°C ambient operating temperature
• 56-Lead VFQFN
• Lead-free (RoHS 6) packaging
QC0
nQC0
QC1
nQC1
V
CCO_C
QC2
nQC2
V
EE
QC3
nQC3
QC4
nQC4
QC5
nQC5
V
EE
V
EE
SE
V
CC
XTAL_SEL
PS_SEL
V
CCA
V
EE
NA_DIV1
NA_DIV0
V
CC_X
XTAL_OUT
XTAL_IN
V
EE
CLK_IN
nOE_B
56 55 54 53 52 51 50 49 48 47 46 45 44 43
1
42
2
3
4
5
6
7
8
9
10
11
12
13
41
40
39
38
37
8T49N012
V
EE
NC_DIV
36
35
34
33
32
31
30
14
29
15 16 17 18 19 20 21 22 23 24 25 26 27 28
nQB1
nQB0
V
CC
NB_DIV
V
CCO_B
nc
QB1
LOCK
QB0
V
EE
FB_DIV
56-Lead VFQFN, 8.0mm x 8.0mm x 0.9mm
8T49N012 REVISION 1 08/21/14
RESERVED
V
CCO_C
1
©2014 Integrated Device Technology, Inc.
8T49N012 DATA SHEET
Block Diagram
LOCK
XTAL_SEL
CLK_IN
XTAL_IN
Pulldown
Pulldown
QA0_CMOS
nQA0_CMOS
0
PS
PD
+
CP
VCO
QA1_CMOS
Xtal
Osc
XTAL_OUT
PS_SEL
1
1/NA
nQA1_CMOS
QA2_CMOS
nQA2_CMOS
Pulldown
1/M
QA3_CMOS
nQA3_CMOS
FB_DIV
NA_DIV[1,0]
SE
Pulldown
Pulldown
Pulldown
QB0
1/NB
NB_DIV
nOE_B
Pulldown
Pulldown
nQB0
QB1
nQB1
QC0
nQC0
QC1
nQC1
QC2
1/NC
NC_DIV
Pulldown
nQC2
QC3
nQC3
QC4
nQC4
QC5
nQC5
nOE_C
Pulldown
FEMTOCLOCK
®
NG CRYSTAL-TO-3.3V, 2.5V LVPECL/LVCMOS
CLOCK GENERATOR
2
REVISION 1 08/21/14
8T49N012 DATA SHEET
Pin Description and Pin Characteristic Tables
Table 1. Pin Descriptions
1
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Name
SE
V
CC
XTAL_SEL
PS_SEL
V
CCA
V
EE
NA_DIV1
NA_DIV0
V
CC_X
XTAL_OUT
XTAL_IN
V
EE
CLK_IN
nOE_B
nc
LOCK
FB_DIV
RESERVED
V
CC
NB_DIV
V
EE
nQB1
QB1
nQB0
QB0
V
CCO_B
NC_DIV
V
CCO_C
nQC5
QC5
Input
Power
Input
Input
Power
Power
Input
Input
Power
O/I
O/I
Power
Input
Input
unused
Output
Input
Reserve
Power
Input
Power
Output
Output
Output
Output
Power
Input
Power
Output
Output
Pulldown
Pulldown
Pulldown
Pulldown
Pulldown
Pulldown
Pulldown
Pulldown
Pulldown
Type
Pulldown
Description
Select pin for Bank A outputs. LVCMOS/LVTTL interface levels.
See the
Function Configuration Tables
section.
Core power supply pins.
Select reference source between the crystal or input clock. LVCMOS/
LVTTL interface levels. See the
Function Configuration Tables
section.
Pre scale divider selection. LVCMOS/LVTTL interface levels.
See the
Function Configuration Tables
section.
Analog supply for VCO.
Negative power supply pin.
Select output frequency for Bank A outputs. LVCMOS/LVTTL interface
levels. See the
Function Configuration Tables
section.
Select output frequency for Bank A outputs. LVCMOS/LVTTL interface
levels. See the
Function Configuration Tables
section.
Crystal oscillator power supply pin.
Crystal oscillator interface output.
Crystal oscillator interface input.
Negative power supply pin.
Single-ended input clock. LVCMOS/LVTTL interface levels.
Output enable for Bank B outputs. LVCMOS/LVTTL interface levels.
See the
Function Configuration Tables
section.
No connect pin.
PLL lock indicator. Logic High indicates PLL is locked. LVCMOS/LVTTL
interface levels. See the
Function Configuration Tables
section.
Feedback divider selection. LVCMOS/LVTTL interface levels.
See the
Function Configuration Tables
section.
Reserve pin. Do not connect.
Core power supply pin.
Select output frequency for Bank B outputs. LVCMOS/LVTTL interface
levels. See the
Function Configuration Tables
section.
Negative power supply pin.
Differential Bank B outputs. LVPECL interface levels.
Differential Bank B outputs. LVPECL interface levels.
Bank B output power supply pin.
Select output frequency for Bank C outputs. LVCMOS/LVTTL interface
levels. See the
Function Configuration Tables
section.
Bank C output power supply pin.
Differential Bank C outputs. LVPECL interface levels.
REVISION 1 08/21/14
3
FEMTOCLOCK
®
NG CRYSTAL-TO-3.3V, 2.5V LVPECL/LVCMOS
CLOCK GENERATOR
8T49N012 DATA SHEET
Table 1. Pin Descriptions
1
(Continued)
Number
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
E-Pad
Name
nQC4
QC4
nQC3
QC3
V
EE
nQC2
QC2
V
CCO_C
nQC1
QC1
nQC0
QC0
nOE_C
V
EE
nQA3_CMOS
QA3_CMOS
V
CCO_A
nQA2_CMOS
QA2_CMOS
V
EE
nQA1_CMOS
QA1_CMOS
V
CCO_A
nQA0_CMOS
QA0_CMOS
V
EE
V
EE
Output
Output
Output
Output
Power
Output
Output
Power
Output
Output
Output
Output
Input
Power
Output
Output
Power
Output
Output
Power
Output
Output
Power
Output
Output
Power
Power
Pulldown
Type
Description
Differential Bank C outputs. LVPECL interface levels.
Differential Bank C outputs. LVPECL interface levels.
Negative power supply pin.
Differential Bank C outputs. LVPECL interface levels.
Bank C output power supply pin.
Differential Bank C outputs. LVPECL interface levels.
Differential Bank C outputs. LVPECL interface levels.
Output enable for Bank C outputs. LVCMOS/LVTTL interface levels.
See the
Function Configuration Tables
section.
Negative power supply pin.
Selectable LVPECL differential or complementary LVCMOS/LVTTL
Bank A outputs.
Bank A output power supply pin.
Selectable LVPECL differential or complementary LVCMOS/LVTTL
Bank A outputs.
Negative power supply pin.
Selectable LVPECL differential or complementary LVCMOS/LVTTL
Bank A outputs.
Bank A output power supply pin.
Selectable LVPECL differential or complementary LVCMOS/LVTTL
Bank A outputs.
Negative power supply pin.
Negative power supply pin.
NOTE 1:
Pulldown
refers to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLDOWN
C
PD
Parameter
Input Capacitance
Input Pulldown Resistor
Power Dissipation
Capacitance (per output)
LVCMOS Output
Impedance
QA[0:3]_CMOS,
nQA[0:3]_CMOS
V
CC,
V
CC_X,
V
CCO_A
= 3.465V
V
CC,
V
CC_X
= 3.465V,
V
CCO_A
= 2.625V
V
CCO_A
= 3.3V ± 5%
V
CCO_A
= 2.5V ± 5%
Test Conditions
Input Control Pins
Minimum
Typical
3.5
51
6.5
6.5
26
30
Maximum
Units
pF
k
pF
pF
Rout
FEMTOCLOCK
®
NG CRYSTAL-TO-3.3V, 2.5V LVPECL/LVCMOS
CLOCK GENERATOR
4
REVISION 1 08/21/14
8T49N012 DATA SHEET
Function Configuration Tables
Table 3A. FB_DIV Function Table
FB_DIV
Low (default)
Mid
High
Feedback Divider
50
75
100
Table 3D. LOCK indicaiotn Table
LOCK
Low
High
PLL Status
PLL is Out of Lock
PLL is Locked
Table 3E. nQE_B Function Table
Table 3B. SE Function Table
SE
Low (default)
Mid
High
Bank A Output
Differential output
High Impedance
LVCMOS output
nOE_B
Low (default)
Mid (Reserved)
High
Bank B Output
LVPECL
Reserved
High Impedance
Table 3F. nOE_C Function Table
Table 3C. XTAL_SEL Function Table
XTAL_SEL
Low (default)
High
Bank A Output
CLK_IN
XTAL
nOE_C
Low (default)
Mid (Reserved)
High
Bank C Output
LVPECL
Reserved
High Impedance
Table 3G. Bank B and C Output Divider Table
Input Frequency
(MHz)
PS_SEL
FB_DIV
NB_DIV
Low (default)
25
Low (default)
Low (default)
Mid
High
Low (default)
66.66667
Mid
Mid
Mid
High
Low (default)
50
High
Low
Mid
High
Bank B
Frequency (MHz)
125
100
156.25
125
100
156.25
125
100
156.25
NC_DIV
Low (default)
Mid
High
Low (default)
Mid
High
Low (default)
Mid
High
Bank C
Frequency (MHz)
125
100
156.25
125
100
156.25
125
100
156.25
REVISION 1 08/21/14
5
FEMTOCLOCK
®
NG CRYSTAL-TO-3.3V, 2.5V LVPECL/LVCMOS
CLOCK GENERATOR
微控制器 MCU
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