IRS21953SPBF
Features
•
•
•
•
•
•
•
2 low side output channels sharing common ground
1 high side output channel
CMOS Schmitt trigger inputs with pull down resistor
Under voltage lockout on all channels
5 V compatible logic level Inputs
Immune to –Vs spike and tolerant to dVs/dt & dVss/dt
Shoot through prevention logic
HIGH SIDE & DUAL LOW SIDE
DRIVER IC
Product Summary
V
OFFSET
(low side)
V
OFFSET
(high side)
V
OUT
t
on
/t
off
(typ)
-600 V (VSS)
600 V (COM)
10 V to 20 V
380 ns/380 ns
0.5 A/0.5 A
Descriptions
The IRS21953 contains 2 low side outputs sharing
common ground and 1 high side output. Low side drivers
can tolerate up to -600 V below input signal (VSS: input
supply return). High side driver can tolerate up to 600 V
above low side ground (COM: low side supply return).
The IRS21953 has better propagation delay and thermal
characteristics compared to a photo-coupler driver. The
logic inputs are compatible with standard CMOS or LSTTL
output. Proprietary HVIC and latch-up immune CMOS
technologies enable ruggedized monolithic construction.
I
o+/-
Package
16-Lead SOIC (narrow body
)
Typical Connection Diagram
IRS21953SPBF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur.
parameters are absolute voltages referenced to COM.
All voltage
Symbol
HIN
LIN1
LIN2
VDD
VSS
VB
VS
HO
VCC
LO1
LO2
dVS/dt
dVSS/dt
P
D
R
θJA
T
J
T
S
T
L
Definition
Floating logic level Input voltage
Floating logic input supply voltage
Floating logic input supply return voltage
High side floating well supply voltage
High side floating well supply return voltage
High side floating gate drive output voltage
Low side supply voltage
Low side output voltage
Allowable VS offset transient relative to earth ground
Allowable VSS offset transient relative to earth ground
Package power dissipation @ T
A
<=+25 ºC
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
Min
VSS-0.3
-0.3
VDD-25
-0.3
VB-25
VS-0.3
-0.3
-0.3
-
-
-
-
-55
-55
-
Max
VDD+0.3
625
VDD+0.3
625
VB+0.3
VB+0.3
25
VCC+0.3
50
50
1
100
150
150
300
Units
V
V/ns
W
ºC/W
ºC
Recommended Operating Conditions
For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute
voltages referenced to COM.
Symbol
HIN
LIN1
LIN2
VDD
VSS
VB
VS
HO
VCC
LO1
LO2
T
A
Definition
Floating logic level input voltage
Floating logic input supply voltage
Floating logic input supply return voltage
High side floating well supply voltage
High side floating well supply return voltage
High side floating gate drive output voltage
Low side supply voltage
Low side output voltage
Ambient temperature
Min
VSS
VSS+10
-5
VS+10
-5
VS
10
0
-40
Max
VDD
VSS+20
600
VS+20
600
VB
20
VCC
125
Units
V
ºC
Note 1:
Logic operation for V
S
of –5 V to 600 V. Logic state held for V
S
of –5 V to –V
BS
. (Please refer to Design Tip
DT97-3 for more details).
2
IRS21953SPBF
Static Electrical Characteristics
(VB-VS)=15 V. The V
IN
, V
IN,TH
, V
BSUV
, V
O
, I
O
and I
IN
parameters are referenced to V
S
. T
A
= 25
o
C unless otherwise
specified.
Symbol
V
CCUV+
V
CCUV-
V
BSUV+
V
BSUV-
V
DDUV+
V
DDUV-
I
LKVCC
I
LKVBS
I
QBS
I
QDD
I
QCC
V
IH
V
IL
V
OH
V
OL
I
IN+
I
IN-
I
o+
I
o-
Definition
V
CC
supply undervoltage positive going threshold
V
CC
supply undervoltage negative going threshold
V
BS
supply undervoltage positive going threshold
V
BS
supply undervoltage negative going threshold
V
DD
supply undervoltage positive going threshold
V
DD
supply undervoltage negative going threshold
Offset supply leakage current – both input well
and output well
Quiescent V
BS
supply current
Quiescent V
DD
supply current
Quiescent V
CC
supply current
Logic “1” input voltage
Logic “0” input voltage
High level output voltage, V
BIAS
-V
O
Low level output voltage, V
O
Logic “1” input bias current
Logic “0” input bias current
Output high short circuit pulsed current
Output low short circuit pulsed current
Min
7.5
7.0
7.5
7.0
7.5
7.0
---
---
---
---
3.5
---
---
---
---
---
---
---
Typ
8.6
8.2
8.6
8.2
8.6
8.2
---
70
100
130
---
---
---
---
2
---
0.5
0.5
Max Units
9.7
9.4
9.7
9.4
9.7
9.4
50
140
200
260
---
0.6
0.1
0.1
10
µA
5
---
A
---
V
µA
V
Test Conditions
V
B
= V
S
= 600 V
V
CC
= V
COM
= 600 V
VIN = 0 V or 5 V
I
o
= 0 A
I
o
= 0 A
VIN = 5 V
VIN = 0 V
V
O
=0 V,V
IN
=0 V,
PW<=10 µs
V
O
=15 V,V
IN
=5 V,
PW<=10 µs
3
IRS21953SPBF
Dynamic Electrical Characteristics (All values are target data)
(VB-VS)= 15 V. C
L
= 1000 pF unless otherwise specified. All parameters are reference to COM. T
A
= 25
o
C unless
otherwise specified.
Symbol
t
on
t
off
t
r
t
f
MT_on
MT_off
Definition
Turn-on propagation delay of high
and low side
Turn-off propagation delay of high
and low side
Turn-on rise time of high and low
side
Turn-off fall time of high and low
side
Turn on propagation delay
matching
Turn off propagation delay
matching
Min
---
---
---
---
---
---
Typ
380
380
25
25
---
---
Max
---
---
70
Units
Test Conditions
V
SS
=200 V, V
S
=0 V
V
SS
=200 V, V
S
=400 V
ns
70
50
50
V
SS
=200 V, V
S
=0 V
V
SS
=200 V, V
S
=400 V
V
SS
=200 V, V
S
=0 V
V
SS
=200 V, V
S
=400 V
4
IRS21953SPBF
Functional Block Diagram
VB
UVLO
R
HIN
Level
LIN1
Shift
Down
LIN2
VSS
Shoot
Through
Prevention
Logic
Level
Shift
Up
VCC
UVLO
R
LO1
Q
R
S
Pulse
Filter
Pulse
Filter
R
S
COM
Q
UVLO
R
LO2
HO
Pulse
Filter
R
S
VS
Q
VDD
UVLO
5V
Regulator
5
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