ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• Available in the following packages:
– Commercial: QSOP, SOIC, SSOP
– Military: CERDIP, LCC
DESCRIPTION:
This buffer/clock driver is built using advanced dual metal CMOS
technology. The FCT805T is a non-inverting clock driver consisting of two
banks of drivers. Each bank drives five output buffers from a standard TTL
compatible input. This part has extremely low output skew, pulse skew, and
package skew. The device has a “heart-beat” monitor for diagnostics and
PLL driving. The monitor output is identical to all other outputs and complies
with the output specifications in this document.
The FCT805T is designed for fast, clean edge rates to provide accurate
clock distribution in high speed systems.
NOTE: EOL for non-green parts to occur on 5/13/10 per
PDN U-09-01
FUNCTIONAL BLOCK DIAGRAM
OE
A
IN
A
5
OA
1
-OA
5
IN
B
5
OB
1
-OB
5
OE
B
MON
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
c
2000
Integrated Device Technology, Inc.
SEPT. 2009
DSC-4771/3
IDT49FCT805BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
OA
2
OA
1
V
CC
OA
1
OA
2
OA
3
GND
OA
4
OA
5
GND
(1)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
OB
1
OB
2
OB
3
GND
OB
4
OB
5
MON
OE
B
IN
B
3
OA
3
GND
OA
4
OA
5
GND
(1)
2
1
20 19
18
17
16
15
14
OB
2
OB
3
GND
OB
4
OB
5
4
5
6
7
8
9
OE
A
10 11 12 13
MON
Outputs
OE
A
IN
A
QSOP/ SOIC/ SSOP/ CERDIP
TOP VIEW
NOTE:
1. Pin 8 is internally connected to GND. To insure compatibility with all products, pin
8 should be connected to GND at the board level.
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
STG
I
OUT
Description
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–65 to +150
–60 to +120
Unit
V
°C
mA
PIN DESCRIPTION
Pin Names
OE
A
,
OE
B
IN
A
, IN
B
OAx, OBx
MON
Clock Inputs
Clock Outputs
Monitor Output
Description
3-State Output Enable Inputs (Active LOW)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
FUNCTION TABLE
(1)
Inputs
OE
A
,
OE
B
IN
A
, IN
B
L
H
L
H
OAx, OBx
L
H
Z
Z
L
L
MON
L
H
L
H
CAPACITANCE
(T
A
= +25 C, f = 1.0MHz)
O
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
4.5
5.5
Max.
6
8
Unit
pF
pF
H
H
NOTE:
1. H = HIGH
L = LOW
Z = High-Impedance
NOTE:
1. This parameter is measured at characterization but not tested.
2
OE
B
IN
A
IN
B
OB
1
V
CC
V
CC
INDEX
IDT49FCT805BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= 0°C to +70°C, Military: T
A
= -55°C to +125°C, V
CC
= 5V ± 10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
I
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(5)
Input LOW Current
(5)
High Impedance Output Current
(3-State Output Pins)
Input HIGH Current
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
= GND
(3)
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –12mA MIL
I
OH
= –15mA COM'L
I
OH
= –24mA MIL
I
OH
= –32mA COM'L
(4)
V
OL
I
OFF
V
H
I
CCL
I
CCH
I
CCZ
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition should not exceed one second.
5. The test limit for this parameter is ±5µA at T
A
= -55°C.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.
V
I
= 2.7V
V
I
= 0.5V
V
O
= 2.7V
V
O
= 0.5V
V
CC
= Max., V
I
= V
CC
(Max.)
Min.
2
—
—
—
—
—
—
—
–60
2.4
2
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
–0.7
–120
3.3
3
0.3
—
150
5
Max.
—
0.8
±1
±1
±1
±1
±1
–1.2
–255
—
—
0.55
±1
—
500
Unit
V
V
µA
µA
µA
µA
V
mA
V
V
V
µA
mV
µA
Output LOW Voltage
Input/Output Power Off Leakage
(5)
Input Hysteresis for all inputs
Quiescent Power Supply Current
V
CC
= Min.
V
IN
= V
IH
or V
IL
—
I
OL
= 32mA MIL
I
OL
= 48mA COM'L
V
CC
= 0V, V
IN
or V
O
≤
4.5V
V
CC
= Max., V
IN
= GND or V
CC
3
IDT49FCT805BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
A
=
OE
B
= GND
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.
Outputs Open
f
O
= 25MHz
50% Duty Cycle
OE
A
=
OE
B
= V
CC
Mon. Output Toggling
V
CC
= Max.
Outputs Open
f
O
= 50MHz
50% Duty Cycle
OE
A
=
OE
B
= GND
Eleven Outputs Toggling
NOTES:
1.
2.
3.
4.
5.
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at V
CC
= 5V, +25°C ambient.
Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
Values for these conditions are examples of the I
C
formula. These limits are guaranteed but not tested.
6.
I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input (V
I
N
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
Test Conditions
(1)
Min.
—
Typ.
(2)
1
60
Max.
2
100
Unit
mA
µA/MHz
V
IN
= V
CC
V
IN
= GND
—
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
1.5
3
—
1.8
4
—
33
55.5
(5)
mA
—
33.5
57.5
(5)
4
IDT49FCT805BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - MILITARY
(1,2)
FCT805BT
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(PP)
Parameter
Propagation Delay
IN
A
to OAx, IN
B
to OBx
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Part-to-part skew: skew between outputs of different
packages at same power supply voltage,
temperature, package type and speed grade
Output Enable Time
OE
A
to OAx,
OE
B
to OBx
Output Disable Time
OE
A
to OAx,
OE
B
to OBx
Conditions
(3)
C
L
= 50pF
R
L
= 500Ω
Min
.
(4)
1.5
—
—
—
—
—
Max
.
5.7
2
1.5
0.9
0.9
1.5
1.5
—
—
—
—
—
FCT805CT
Min
.
(4)
Max
.
5.2
2
1.5
0.7
0.8
1.2
Unit
ns
ns
ns
ns
ns
ns
t
PZL
t
PZH
t
PLZ
t
PHZ
1.5
1.5
6.5
6.5
1.5
1.5
6
6
ns
ns
NOTES:
1. t
PLH
, t
PHL
, and t
SK
(pp) are production tested. All other parameters are guaranteed but not production tested.
2. Propagation delay range indicated by Min. and Max. limit is dues to Vcc, operating temperature, and process parameters. These propagation delay limits do not imply
skew.
3. See Test Circuits and Waveforms.
4. Minimum limits are guaranteed but not tested on Propagation Delays.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL
(1,2)
FCT805BT
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
t
SK(PP)
Parameter
Propagation Delay
IN
A
to OAx, IN
B
to OBx
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all banks of
same package (inputs tied together)
Pulse skew: skew between opposite transitions
of same output (|t
PHL -–
t
PLH
|)
Part-to-part skew: skew between outputs of different
packages at same power supply voltage,
temperature, package type and speed grade
t
PZL
t
PZH
t
PLZ
t
PHZ
Output Enable Time
OE
A
to OAx,
OE
B
to OBx
Output Disable Time
OE
A
to OAx,
OE
B
to OBx
1.5
1.5
6
6
1.5
1.5
5
5
ns
ns
Conditions
(3)
C
L
= 50pF
R
L
= 500Ω
Min
.
(4)
1.5
—
—
—
—
—
Max
.
5
1.5
1.5
0.7
0.7
1.2
1.5
—
—
—
—
—
FCT805CT
Min
.
(4)
Max
.
4.5
1.5
1.5
0.5
0.6
1
Unit
ns
ns
ns
ns
ns
ns
NOTES:
1. t
PLH
, t
PHL
, and t
SK
(pp) are production tested. All other parameters are guaranteed but not production tested.
2. Propagation delay range indicated by Min. and Max. limit is dues to Vcc, operating temperature, and process parameters. These propagation delay limits do not imply
skew.
3. See Test Circuits and Waveforms.
4. Minimum limits are guaranteed but not tested on Propagation Delays.
Logic analyzers are widely used tools in digital design verification and debugging. They can verify the proper functioning of digital circuits and help users identify and troubleshoot faults. They ...[详细]
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