CML Microcircuits
COMMUNICA
TION SEMICONDUCTORS
D/972/2 February 2015
CMX972
Quadrature Demodulator
with IF PLL/VCO
Provisional Issue
Features
20 – 300MHz IF/RF Demodulator
10MHz Rx I/Q Bandwidth
< 1 degree I/Q Phase Matching
< 0.5 dB I/Q Gain Matching
Low Power, 3.0V – 3.6V Operation
Small 32-lead VQFN Package
n/c
RXLO
VCO
P2
VCO
P1
Applications
Wireless Data Terminals
HF/VHF and UHF Mobile Radio
Avionics Radio Systems
Software Defined Radio (SDR)
Satellite Terminals
VCO
N1
VCO
N2
OA1O
OA1N
n/c
VCO
40-1000MHz
n/c
OA1P
VSS
n/c
CSN
n/c
Local oscillator
switching
IFIN
OA2O
OA2N
VCC
Quadrature
demodulator
RXIN
PLL
RXIP
Serial bus
and
control
OA2P
RDATA
SCLK
RXQP
RXQN
n/c
REFIN
DO
VCC
CDATA
SYNTH
VDD
2015 CML Microsystems Plc
Quadrature Demodulator with IF PLL/VCO
CMX972
1
Brief Description
The CMX972 features a low-power quadrature IF/RF demodulator with wide operating frequency range
and optimised power consumption. The demodulator is suitable for superheterodyne architectures with IF
frequencies up to 300MHz and the device may be used in low IF systems or in those converting down to
baseband. An on-chip PLL and VCO, together with uncommitted baseband differential amplifiers, provide
additional flexibility. Control of the CMX972 is by serial bus. The CMX972 is supplied in an RF-optimised
32-lead VQFN package.
2015 CML Microsystems Plc
2
D/972/2
Quadrature Demodulator with IF PLL/VCO
CMX972
CONTENTS
Section
1
Page
Brief Description .................................................................................................. 2
1.1
History .............................................................................................................. 5
Block Diagram ...................................................................................................... 6
Pin List .................................................................................................................. 7
External Components .......................................................................................... 8
Power Supply Decoupling ................................................................................ 8
Quadrature Demodulator ................................................................................. 9
Local Oscillator (LO) Input ............................................................................... 9
VCO and PLL ................................................................................................... 9
Differential Amplifiers ..................................................................................... 12
4.5.1 I/Q Output Amplifiers ............................................................................... 12
4.5.2 Low IF Output .......................................................................................... 13
2
3
4
4.1
4.2
4.3
4.4
4.5
5
General Description ........................................................................................... 14
5.1
Quadrature Demodulator ............................................................................... 14
5.1.1 I/Q Amplitude and Phase Correction ....................................................... 14
5.1.2 DC Offset Correction ............................................................................... 16
5.2
Differential Amplifiers ..................................................................................... 17
5.3
Local Oscillator (LO) ...................................................................................... 17
5.3.1 Demodulator LO Input ............................................................................. 17
5.3.2 VCO and PLL .......................................................................................... 17
C-BUS Interface and Register Description ...................................................... 20
General Reset Command .............................................................................. 21
6.1.1 General Reset Command - $1A: no data ................................................ 21
General Control Register ............................................................................... 22
6.2.1 General Control Register - $1B: 8-bit write ............................................. 22
6.2.2 General Control Register - $EB: 8-bit read ............................................. 22
Rx Control Register ....................................................................................... 22
6.3.1 Rx Control Register - $1C: 8-bit write...................................................... 22
6.3.2 Rx Control Register - $EC: 8-bit read ..................................................... 23
Rx Mode Register .......................................................................................... 23
6.4.1 Rx Mode Register - $1D: 8-bit write ........................................................ 23
6.4.2 Rx Mode Register - $ED: 8-bit read ........................................................ 24
Rx Offset Register ......................................................................................... 24
6.5.1 Rx Offset Register - $1F: 8-bit write ........................................................ 24
6.5.2 Rx Offset Register - $EF: 8-bit read ........................................................ 25
PLL M Divider Register .................................................................................. 25
6.6.1 PLL M Divider - $2C - $2A: 8-bit write ..................................................... 25
6.6.2 PLL M Divider - $DC - $DA: 8-bit read .................................................... 26
PLL R Divider Register .................................................................................. 26
6.7.1 PLL R Divider - $2E - $2D: 8-bit write ..................................................... 26
6.7.2 PLL R Divider - $DE - $DD: 8-bit read .................................................... 26
VCO Control Register .................................................................................... 26
6.8.1 VCO Control Register - $2F: 8-bit write................................................... 26
6.8.2 VCO Control Register - $DF: 8-bit read .................................................. 27
6
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
7
Application Notes ............................................................................................... 28
7.1
IF/RF Input Matching ..................................................................................... 28
2015 CML Microsystems Plc
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D/972/2
Quadrature Demodulator with IF PLL/VCO
CMX972
7.2
7.3
7.4
7.5
7.6
7.7
8
Demodulator Intermodulation and Output Drive Capability ........................... 29
Variation with Temperature............................................................................ 29
Effect of Gain Control on Receiver Performance .......................................... 30
Measurement of CMX972 Demodulator Intermodulation Performance ........ 32
Operation with large input signals .................................................................. 33
VCO Phase Noise .......................................................................................... 34
Performance Specification ................................................................................ 35
8.1
Electrical Performance................................................................................... 35
8.1.1 Absolute Maximum Ratings .................................................................... 35
8.1.2 Operating Limits ...................................................................................... 35
8.1.3 Operating Characteristics ........................................................................ 36
8.2
Packaging ...................................................................................................... 41
Section
Page
Table 1 Pin List ................................................................................................................... 7
Table 2 Power Supply Component Values ......................................................................... 8
Table 3 Quadrature Demodulator Input Components ........................................................ 9
Table 4 Internal VCO Amplifier Tank Circuit for 180MHz Operation ................................ 11
rd
Table 5 3 Order Loop Filter Circuit for 180MHz Operation ............................................ 11
Table 6 Rx I/Q Differential to Single-ended Amplifier Components ................................. 12
Table 7 Rx Low IF (455kHz) Components ....................................................................... 13
Table 8 Typical Phase Balance, LO/2 Mode .................................................................... 15
Table 9 Recommended FREQ bit Settings in the Rx Mode Register .............................. 15
Table 10 Effect of FREQ bits ($1D, b3-b0) on I/Q Phase Balance at 250MHz ................ 16
Table 11 Effect of FREQ bits ($1D, b3-b0) on I/Q Phase Balance at 300MHz with Temperature
.......................................................................................................................................... 16
Table 12 DC Offset Correction Adjustments .................................................................... 16
Table 13 LO Connections................................................................................................. 17
Table 14 PLL Control ....................................................................................................... 19
Table 15 Quadrature Demodulator Input Impedances and Parallel Equivalent Circuit .... 28
Table 16 Typical Noise Figure and Gain of IF Amp, VGA and I/Q Mixer ......................... 29
Table 17 Typical Third Order Intercept Performance of demodulator at 45MHz (straight-in case)
.......................................................................................................................................... 29
Table 18 Effect of VCONR bits, f
vco
= 180 MHz, divide-by-2 ........................................... 34
Section
Page
Figure 1 Block Diagram ...................................................................................................... 6
Figure 2 Power Supply Connections and Decoupling ........................................................ 8
Figure 3 IF Input Match Circuit ........................................................................................... 9
Figure 4 RXLO Input Configuration .................................................................................... 9
Figure 5 Example External Components – VCO External Tank Circuit ........................... 10
Figure 6 Example External Components – PLL Loop Filter ............................................. 11
Figure 7 Example External Components – Receive I/Q Output ....................................... 12
Figure 8 Example External Components – Receive Low IF Output ................................. 13
Figure 9 Demodulator Gain Control ................................................................................. 14
Figure 10 Frequency Response, showing effect of COR bit ($1C, b6) and FREQ bits($1D, b3-b0)
.......................................................................................................................................... 15
Figure 11 Simplified Schematic DC Offset Correction Circuit .......................................... 16
Figure 12 PLL Architecture ............................................................................................... 18
Figure 13 C-BUS Transactions ........................................................................................ 21
Figure 14 Quadrature Demodulator Input Impedance (10MHz to 300MHz) .................... 28
Figure 15 Demodulator Gain Variation With Temperature ............................................... 30
Figure 16 Variation in Gain with Temperature (COR = ‘0’ $1D = 0x00) .......................... 30
Figure 17 Variation in CMX972 Demodulator Noise Figure with VGA/VGB Control ........ 31
2015 CML Microsystems Plc
4
D/972/2
Quadrature Demodulator with IF PLL/VCO
CMX972
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
Variation in Input Third Order Intercept Point with VGA/VGB Control ............. 31
Variations in Signal and IMD Product Levels ................................................... 32
Output Signal Level Variations with Large Input Signals .................................. 33
Effect of VCO Gain on Phase Noise ................................................................ 34
C-BUS Timing .................................................................................................. 40
Q5 Mechanical Outline:
Order as part no. CMX972Q5
................................... 41
1.1
History
Changes
Corrected VCO range to 40 – 1000MHz and changed varactor diode to
Toshiba 1SV305
Original document, first approved.
Date
17/2/15
7/12/12
Version
2
1
2015 CML Microsystems Plc
5
D/972/2
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