CML Microcircuits
COMMUNICA
TION SEMICONDUCTORS
D/608_18_38/11
September 2014
CMX608/CMX618/
CMX638
RALCWI Vocoders
Provisional Issue
Features
Near Toll Quality RALCWI Coding Algorithm
Multiple Bit Rate Modes:
2400 or 2750 bps
3600 bps with FEC Enabled
4-bit Viterbi Soft Decision Decoding
Integrated Audio CODEC (CMX618/CMX638 only)
Integrated Input and Output Channel Filters
20ms, 40ms, 60ms and 80ms Packet Lengths
No Licensing or Royalty Payments
Ancillary Audio Functions:
Voice Activity Detector
Comfort Noise Generator
DTMF and Single Tone Regeneration
1.8V Low Power Operation, 3.3V Tolerant I/O
Small 48-pin LQFP and VQFN Packages
Applications
Digital PMR, LMR, Voice Radio
Digital Trunking
DMR TDMA
DMR FDMA, dPMR
Digital Voice Scrambling and Encryption
Digital WLL
Voice Storage and Playback Systems
Regenerative Digital Voice Repeaters
Messaging Systems
VoIP Systems
Voice Pagers
Half-Duplex Vocoding (CMX608/CMX618)
Full-Duplex Vocoding (CMX638 only)
1.
Brief Description
The CMX608/CMX618/CMX638 are flexible, high integration, high performance, RALCWI (Robust
Advanced Low Complexity Waveform Interpolation) Vocoders, offering near toll quality voice at very low bit
rates. A Forward Error Correction (FEC) engine provides optimum performance in real life applications.
The RALCWI Vocoder comprises four independent functions which are selectable by the host: Voice
Encoder, FEC Encoder, Voice Decoder and FEC Decoder. The CMX608 and CMX618 are half-duplex
Vocoders and the CMX638 is a full-duplex Vocoder with integrated voice CODEC.The CMX618 includes
an integrated voice CODEC, offering a complete analogue voice to low bit rate vocoded data function, with
integrated channel filters removing the need for external components, whereas the CMX608 requires an
external voice CODEC.
CMX608/CMX618/CMX638 operate from a dual power supply (1.8V and 3.3V) and are available in both
48-pin LQFP (L4) and 48-pin VQFN (Q3) packages.
Continued overleaf .....
2014 CML Microsystems Plc
RALCWI Vocoder
CMX608/CMX618/CMX638
In encode mode, the voice encoder uses a 20ms voice frame size with two programmable bit rates:
2400bps or 2750bps. The optional FEC encoder performs channel coding of the encoded voice (2400bps
or 2750bps, depending on the selected mode) and forms an encoded, interleaved bit-stream of 3600bps
(216 bits per 60ms packet or 288 bits per 80ms packet). The FEC operation utilises a packet of either 3 or
4 x 20ms Vocoder frames to provide optimum error correction performance.
In decode mode, the optional FEC decoder performs de-interleaving and channel decoding of the coded
bit-stream (216 bits per 60ms packet or 288 bits per 80ms packet) and forms an error-corrected bit-stream
of encoded voice at 2400bps or 2750bps rate, depending on the selected mode. The FEC decoder can
optionally use "soft decision" metrics to improve its decoding ability. The voice decoder then converts the
error-corrected bit-stream back into a digitised voice signal.
Soft Decision Decoding (SDD), Discontinuous Transmission detection (DTX), Voice Activity Detection
(VAD) and Comfort Noise Generation (CNG) functions are also included, to further enhance the overall
performance. Single (STD) and Dual (DTMF) Tones can be detected and sent separately in the coded bit-
stream, then regenerated at the far end.
New features and enhancements to existing functions may be provided from time to time, expanding the
capabilities of the Vocoder. These are provided as Function Images™, a hex format file that can be loaded
via the C-BUS at run-time. Function Images™ can be downloaded from the CML Portal, a secure area of
the CML website. Details of currently available Function Images™ can be found in the
CMX608/CMX618/CMX638 Product page on the CML website.
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RALCWI Vocoder
CMX608/CMX618/CMX638
CONTENTS
Section
1.
2.
3.
4.
Page
Brief Description ..................................................................................................................... 1
Block Diagram ......................................................................................................................... 5
Signal List ................................................................................................................................ 6
External Components ............................................................................................................. 9
4.1. PCB Layout Guidelines and Power Supply Decoupling ................................................. 11
4.2. Audio CODEC External Components (CMX618/CMX638 only) .................................... 12
General Description .............................................................................................................. 13
5.1. Initialisation .................................................................................................................... 14
5.2. Encoder .......................................................................................................................... 15
5.2.1. Single Frame Packet, without FEC, STD or DTMF .............................................. 15
5.2.2. Multiple Frame Packet with FEC, but without STD or DTMF ............................... 16
5.3. Decoder ......................................................................................................................... 16
5.3.1. Single Frame Packet, without FEC, STD or DTMF .............................................. 17
5.3.2. Multiple Frame Packet with FEC, but without STD or DTMF ............................... 19
5.4. Overall Signal Latency ................................................................................................... 20
5.5. Vocoder Data Format and Bit Order .............................................................................. 20
5.5.1. Packets of Raw Vocoder Frames ........................................................................ 20
5.5.2. Packets of FEC Protected Frames ...................................................................... 22
5.6. External CODEC Support .............................................................................................. 23
5.7. Operation with DTMF (Dual Tone Multi-Frequency) ...................................................... 26
5.7.1. DTMF Transmit .................................................................................................... 26
5.7.2. DTMF Receive ..................................................................................................... 26
5.7.3. DTMF Format ....................................................................................................... 27
5.8. Operation with STD (Single Tones) ............................................................................... 28
5.9. C-BUS Interface ............................................................................................................. 29
5.10. C-BUS Registers............................................................................................................ 32
5.10.1. Command Registers ............................................................................................ 32
5.10.2. 8 Bit Write-Only Registers .................................................................................... 33
5.10.3. 8 Bit Read-Only Registers .................................................................................... 44
5.10.4. 16-bit Write-Only Registers .................................................................................. 46
5.10.5. 16-bit Read-Only Registers .................................................................................. 51
Application Notes.................................................................................................................. 55
6.1. Basic Operation of the Vocoder ..................................................................................... 55
6.2. FEC and LLR Decoding ................................................................................................. 57
6.3. DTX and SID Functions ................................................................................................. 57
6.4. Single Tone Transfer ..................................................................................................... 57
6.5. Slip Management ........................................................................................................... 57
6.6. Setting the Watermarks for the Vocoder Data Input (Output) FIFOs ............................ 59
6.7. Download Protocol for Function Images™ .................................................................... 59
6.8. Using the PLEVEL register to set the Input Gain ........................................................... 60
Performance Specification ................................................................................................... 61
7.1. Electrical Performance ................................................................................................... 61
7.1.1. Absolute Maximum Ratings ................................................................................. 61
7.1.2. Operating Limits ................................................................................................... 61
7.1.3. Operating Characteristics ..................................................................................... 62
7.2. Packaging ...................................................................................................................... 68
5.
6.
7.
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D/608_18_38/11
RALCWI Vocoder
CMX608/CMX618/CMX638
Table
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Page
Clock/Crystal Selection .....................................................................................................10
DTMF - Format 1...............................................................................................................27
Standard DTMF Keypad Layout ........................................................................................28
DTMF - Format 2...............................................................................................................28
C-BUS Register Addresses ...............................................................................................31
Decoder Packet Description ..............................................................................................43
Encoder Packet Description ..............................................................................................45
Figure
Page
Figure 1 Block Diagram ....................................................................................................................5
Figure 2 CMX608 Recommended External Components ................................................................9
Figure 3 CMX618/CMX638 Recommended External Components ...............................................10
Figure 4 CMX618/CMX638 Power Supply and De-coupling ..........................................................11
Figure 5 Recommended External Components – Differential CODEC Inputs ...............................12
Figure 6 Recommended External Components – Single-ended CODEC Inputs ...........................12
Figure 7 Recommended External Components – CODEC Output ................................................12
Figure 8 Single Frame Packet Encoding ........................................................................................15
Figure 9 Multiple Frame Packet Encoding .....................................................................................16
Figure 10 Single Frame Packet Decoding .....................................................................................18
Figure 11 Single Frame Packet Decoding with Host Jitter .............................................................18
Figure 12 Single Frame Packet Decoding with Host Jitter (Increased IDD) ..................................19
Figure 13 Multiple Frame Packet Decoding ...................................................................................19
Figure 14 Overall Signal Latency ...................................................................................................20
Figure 15 PCM3500 Interface ........................................................................................................25
Figure 16 Basic C-BUS Transactions ............................................................................................29
Figure 17 C-BUS Data-Streaming Operation .................................................................................30
Figure 18 C-BUS Timing ................................................................................................................66
Figure 19 CODEC (SSP) Port Timing (Slave Mode) ......................................................................66
Figure 20 ADC Input Filter - Typical Response ..............................................................................67
Figure 21 DAC Output Filter - Typical Response ...........................................................................67
Figure 22 48-pin LQFP Mechanical Outline (L4) ...........................................................................68
Figure 23 48-pin VQFN Mechanical Outline (Q3) ..........................................................................69
It is always recommended that you check for the latest product datasheet version from the Datasheets
page of the CML website: [http://www.cmlmicro.com/].
History
Version
11
10
9
8
7
Changes
Editorial improvements
Corrected the lack of termination of the SYNC pin (pin 25)
Corrected minor rerrors and the table definition of bits 2, 3 in section 5.10.1.
Clarified the function of the ENABXTAL and RESETN/General Reset functions.
Added power supply ground plane layout drawing.
Clarification of when to write packets in full duplex mode
Information added about loading Function Images™ into the device
Clarification on choice of Xtal and Clock speed
Clarification on use of the CLOCK and DTMFATTEN registers
Information added about use of the PLEVEL (peak level) register
Corrections to "Basic Operation of the Vocoder" (section 6.1) and to "Download
Protocol for Function Updates" (section 6.7)
Typical I
DD
Digital current consumption figure amended for full duplex mode
Correction to the description of dPMR frames in section 5.4.2
First Release of document with CMX638 (full-duplex device) included
Date
19.09.14
31.07.12
19.05.09
12.12.08
18.07.08
6
19.03.08
2014 CML Microsystems Plc
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D/608_18_38/11
RALCWI Vocoder
CMX608/CMX618/CMX638
2.
Block Diagram
Figure 1 Block Diagram
2014 CML Microsystems Plc
5
D/608_18_38/11
PCB设计
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