CD40102BMS
CD40103BMS
December 1992
CMOS 8-Stage Presettable
Synchronous Down Counters
Description
CD40102BMS and CD40103BMS consist of an 8-stage syn-
chronous down counter with a single output which is active
when the internal count is zero. The CD40102BMS is config-
ured as two cascaded 4-bit BCD counters, and the
CD40103BMS contains a single 8-bit binary counter. Each
type has control inputs for enabling or disabling the clock, for
clearing the counter to its maximum count, and for presetting
the counter either synchronously or asynchronously. All con-
trol inputs and the CARRY-OUT/ZERO-DETECT output are
active-low logic.
In normal operation, the counter is decremented by one
count on each positive transition of the CLOCK. Counting is
inhibited when the CARRY-IN/COUNTER ENABLE (CI/CE)
inputs is high. The CARRY-OUT/ZERO-DETECT (CO/ZD)
output goes low when the count reaches zero if the CI/CE
input is low, and remains low for one full clock period.
When the SYNCHRONOUS PRESET-ENABLE (SPE) input
is low, data at the JAM input is clocked into the counter on
the next positive clock transition regardless of the state of
the CI/CE input. When the ASYNCHRONOUS PRESET-
ENABLE (APE) input is low, data at the JAM inputs is asyn-
chronously forced into the counter regardless of the state of
the SPE, CI/CE, or CLOCK inputs. JAM inputs J0-J7 repre-
sent two 4-bit BCD words for the CD40102BMS and a single
8-bit binary word for the CD40103BMS.
When the CLEAR (CLR) input is low, the counter is asyn-
chronously cleared to its maximum count (99
10
for the
CD40102BMS and 255
10
for the CD40103BMS) regardless
of the state of any other input. The precedence relationship
between control inputs is indicated in the truth table.
If all control inputs except CI/CE are high at the time of zero
count, the counters will jump to the maximum count, giving a
counting sequence of 100 or 256 clock pulses long.
This causes the CO/ZD output to go low to enable the clock
on each succeeding clock pulse.
CD40102BMS, CD40130BMS
TOP VIEW
CLOCK
CLEAR
1
2
3
4
5
6
7
8
16 VDD
SYNCHRONOUS
15
PRESET ENABLE
14 CARRY OUT/
ZERO DETECT
13 J7
12 J6
11 J5
10 J4
9 ASYNCHRONOUS
PRESET ENABLE
Features
• High Voltage Type (20V Rating)
• CD40102BMS: 2-Decade BCD Type
• CD40103BMS: 8-Bit Binary Type
• Synchronous or Asynchronous Preset
• Medium Speed Operation
- fCL = 3.6MHz (Typ) at 10V
• Cascadable
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25
o
C
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Standardized Symmetrical Output Characteristics
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Divide-By- “N” Counters
• Programmable Times
• Interrupt Timers
• Cycle/Program Counter
Pinout
The CD40102BMS and CD40103BMS may be cascaded
using the CI/CE input and the CO/ZD output, in either a syn-
chronous or ripple mode as shown in Figures 16 and 17.
The CD40102MS and CD40103BMS are supplied in these
16-lead outline packages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
*CD40102B Only
*H4W †H4X
*H1L
†H1F
H6W
†CD40130B Only
CARRY IN/
COUNTER ENABLE
J0
J1
J2
J3
VSS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
File Number
3351
7-1294
Specifications CD40102BMS, CD40103BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265
o
C
At Distance 1/16
±
1/32 Inch (1.59mm
±
0.79mm) from case for
10s Maximum
Reliability Information
Thermal Resistance
θ
ja
θ
jc
o
C/W
o
C/W
Ceramic DIP Package . . . . . . . . . . . . . 80
20
Flatpack Package . . . . . . . . . . . . . . . . 70
o
C/W
20
o
C/W
Maximum Package Power Dissipation (PD) at +125
o
C
For T
A
= -55
o
C to +100
o
C (Package Type D, F, K) . . . . . . 500mW
For T
A
= +100
o
C to +125
o
C (Package Type D, F, K). . . . . . Derate
Linearity at 12mW/
o
C to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For T
A
= Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
SUBGROUPS
1
2
VDD = 18V, VIN = VDD or GND
Input Leakage Current
IIL
VIN = VDD or GND
VDD = 20V
3
1
2
VDD = 18V
Input Leakage Current
IIH
VIN = VDD or GND
VDD = 20V
3
1
2
VDD = 18V
Output Voltage
Output Voltage
Output Current (Sink)
Output Current (Sink)
Output Current (Sink)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Output Current (Source)
N Threshold Voltage
P Threshold Voltage
Functional
VOL15
VOH15
IOL5
IOL10
IOL15
IOH5A
IOH5B
IOH10
IOH15
VNTH
VPTH
F
VDD = 15V, No Load
VDD = 15V, No Load (Note 3)
VDD = 5V, VOUT = 0.4V
VDD = 10V, VOUT = 0.5V
VDD = 15V, VOUT = 1.5V
VDD = 5V, VOUT = 4.6V
VDD = 5V, VOUT = 2.5V
VDD = 10V, VOUT = 9.5V
VDD = 15V, VOUT = 13.5V
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
VDD = 2.8V, VIN = VDD or GND
VDD = 20V, VIN = VDD or GND
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Input Voltage Low
(Note 2)
Input Voltage High
(Note 2)
Input Voltage Low
(Note 2)
Input Voltage High
(Note 2)
VIL
VIH
VIL
VIH
VDD = 5V, VOH > 4.5V, VOL < 0.5V
VDD = 5V, VOH > 4.5V, VOL < 0.5V
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
3
1, 2, 3
1, 2, 3
1
1
1
1
1
1
1
1
1
7
7
8A
8B
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
LIMITS
TEMPERATURE
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C, +125
o
C, -55
o
C
MIN
-
-
-
-100
-1000
-100
-
-
-
-
MAX
10
1000
10
-
-
-
100
1000
100
50
-
-
-
-
-0.53
-1.8
-1.4
-3.5
-0.7
2.8
UNITS
µA
µA
µA
nA
nA
nA
nA
nA
nA
mV
V
mA
mA
mA
mA
mA
mA
mA
V
V
V
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
(NOTE 1)
VDD = 20V, VIN = VDD or GND
+25
o
C, +125
o
C, -55
o
C 14.95
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+125
o
C
-55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
+25
o
C, +125
o
C, -55
o
C
-
3.5
-
11
0.53
1.4
3.5
-
-
-
-
-2.8
0.7
VOH > VOL <
VDD/2 VDD/2
1.5
-
4
-
V
V
V
V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
7-1295
Specifications CD40102BMS, CD40103BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
SUBGROUPS TEMPERATURE
9
10, 11
VDD = 5V, VIN = VDD or GND
9
10, 11
VDD = 5V, VIN = VDD or GND
9
10, 11
VDD = 5V, VIN = VDD or GND
9
10, 11
TTHL
TTLH
FCL
VDD = 5V, VIN = VDD or GND
9
10, 11
VDD = 5V, VIN = VDD or GND
9
10, 11
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
+25
o
C
+125
o
C, -55
o
C
LIMITS
MIN
-
-
-
-
-
-
-
-
-
-
.7
.52
MAX
600
810
400
540
1300
1755
750
1012
200
270
-
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
PARAMETER
Propagation Delay
Clock to Output
Propagation Delay
Carry In/Counter Enable
to Output
Propagation Delay
Asynchronous Preset
Enable to Output
Propagation Delay
Clear to Output
Transition Time
SYMBOL
TPHL1
TPLH1
TPHL2
TPLH2
TPHL3
TPLH3
TPLH4
CONDITIONS
(NOTE 1, 2)
VDD = 5V, VIN = VDD or GND
Maximum Clock Input
Frequency
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55
o
C and +125
o
C limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
VDD = 5V, VIN = VDD or GND
NOTES
1, 2
TEMPERATURE
-55
o
C, +25
o
C
+125
o
C
VDD = 10V, VIN = VDD or GND
1, 2
-55
o
C, +25
o
C
+125
o
C
VDD = 15V, VIN = VDD or GND
1, 2
-55
o
C, +25
o
C
+125
o
C
Output Voltage
Output Voltage
Output Voltage
Output Voltage
Output Current (Sink)
VOL
VOL
VOH
VOH
IOL5
VDD = 5V, No Load
VDD = 10V, No Load
VDD = 5V, No Load
VDD = 10V, No Load
VDD = 5V, VOUT = 0.4V
1, 2
1, 2
1, 2
1, 2
1, 2
+25
o
C, +125
o
C,
-55
o
C
+25
o
C, +125
o
C,
-55
o
C
+25
o
C, +125
o
C,
-55
o
C
+25
o
C, +125
o
C,
-55
o
C
+125
o
C
-55
o
C
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1, 2
+125
o
C
-55
o
C
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1, 2
+125
o
C
-55
o
C
Output Current (Source)
IOH5A
VDD = 5V, VOUT = 4.6V
1, 2
+125
o
C
-55
o
C
Output Current (Source)
IOH5B
VDD = 5V, VOUT = 2.5V
1, 2
+125
o
C
-55
o
C
MIN
-
-
-
-
-
-
-
-
4.95
9.95
0.36
0.64
0.9
1.6
2.4
4.2
-
-
-
-
MAX
5
150
10
300
10
600
50
50
-
-
-
-
-
-
-
-
-0.36
-0.64
-1.15
-2.0
UNITS
µA
µA
µA
µA
µA
µA
mV
mV
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
7-1296
Specifications CD40102BMS, CD40103BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
Output Current (Source)
SYMBOL
IOH10
CONDITIONS
VDD = 10V, VOUT = 9.5V
NOTES
1, 2
TEMPERATURE
+125
o
C
-55
o
C
Output Current (Source)
IOH15
VDD =15V, VOUT = 13.5V
1, 2
+125
o
C
-55
o
C
Input Voltage Low
Input Voltage High
Propagation Delay
Clock to Output
Propagation Delay
Carry In/Counter Enable
to Output
Propagation Delay
Asynchronous Preset En-
able to Output
Propagation Delay
Clear to Output
Transition Time
VIL
VIH
TPHL1
TPLH1
TPHL2
TPLH2
TPHL3
TPLH3
TPLH4
VDD = 10V, VOH > 9V, VOL < 1V
VDD = 10V, VOH > 9V, VOL < 1V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
TTHL1
TTLH1
FCL
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
TSU
VDD = 5V
VDD = 10V
VDD = 15V
Minimum CI/CE Setup
Time
TSU
VDD = 5V
VDD = 10V
VDD = 15V
Minimum Clock Pulse
Width
TW
VDD = 5V
VDD = 10V
VDD = 15V
Minimum APE Pulse
Width
TW
VDD = 5V
VDD = 10V
VDD = 15V
Minimum JAM Setup
Time (Synchronous Pre-
setting)
Minimum APE Removal
Time
TSU
VDD = 5V
VDD = 10V
VDD = 15V
TREM
VDD = 5V
VDD = 10V
VDD = 15V
Minimum CLR Pulse
Width
TW
VDD = 5V
VDD = 10V
VDD = 15V
1, 2
1, 2
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2
1, 2
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
+25
o
C, +125
o
C,
-55
o
C
+25
o
C, +125
o
C,
-55
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
-
-
-
-
7
-
-
-
-
-
-
-
-
-
-
1.8
2.4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MAX
-0.9
-1.6
-2.4
-4.2
3
-
260
190
180
130
600
400
360
200
100
80
-
-
280
140
100
500
250
150
300
180
80
360
160
120
200
80
60
220
100
70
320
160
100
UNITS
mA
mA
mA
mA
V
V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Maximum Clock Input
Frequency
Minimum SPE Setup
Time
7-1297
Specifications CD40102BMS, CD40103BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
Input Capacitance
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
N Threshold Voltage
N Threshold Voltage
Delta
P Threshold Voltage
P Threshold Voltage
Delta
Functional
SYMBOL
IDD
VNTH
∆VTN
VTP
∆VTP
F
CONDITIONS
VDD = 20V, VIN = VDD or GND
VDD = 10V, ISS = -10µA
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
VSS = 0V, IDD = 10µA
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL
TPLH
VDD = 5V
1, 2, 3, 4
+25
o
C
NOTES
1, 4
1, 4
1, 4
1, 4
1, 4
1
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
MIN
-
-2.8
-
0.2
-
VOH >
VDD/2
-
MAX
25
-0.2
±1
2.8
±1
VOL <
VDD/2
1.35 x
+25
o
C
Limit
UNITS
µA
V
V
V
V
V
SYMBOL
CIN
CONDITIONS
Any Input
NOTES
1, 2
TEMPERATURE
+25
o
C
MIN
-
MAX
7.5
UNITS
pF
ns
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25
o
C limit.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25
o
C
PARAMETER
Supply Current - MSI-2
Output Current (Sink)
Output Current (Source)
SYMBOL
IDD
IOL5
IOH5A
±
1.0µA
±
20% x Pre-Test Reading
±
20% x Pre-Test Reading
DELTA LIMIT
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
Initial Test (Pre Burn-In)
Interim Test 1 (Post Burn-In)
Interim Test 2 (Post Burn-In)
PDA (Note 1)
Interim Test 3 (Post Burn-In)
PDA (Note 1)
Final Test
Group A
Group B
Subgroup B-5
Subgroup B-6
MIL-STD-883
METHOD
100% 5004
100% 5004
100% 5004
100% 5004
100% 5004
100% 5004
100% 5004
Sample 5005
Sample 5005
Sample 5005
GROUP A SUBGROUPS
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9, Deltas
1, 7, 9
1, 7, 9, Deltas
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
1, 7, 9
Subgroups 1, 2, 3, 9, 10, 11
IDD, IOL5, IOH5A
READ AND RECORD
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
7-1298
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
