CALIFORNIA MICRO DEVICES
PACTFSERIES
P/ACTIVE
®
CLOCK TERMINATION AND FILTER
Features
8 Channels in Miniature QSOP Package
Frequency Response to greater than 3 GHz
Low In-Band Insertion Loss Maintains
Signal Integrity
Low Distortion, Low Cross Talk
ESD Protected
Applications
High speed microprocessor clock termination
Pin Assignments
O
bs
Pr o
od le
te
uc
t
Absolute Tolerance (R)
Absolute Tolerance (C)
Operating Temperature Range
Power Rating/Resistor
Leakage Current
Crosstalk (see Text Circuit)
ESD Clamp
Positive Clamp
Negative Clamp
ESD Protection*
Storage Temperature
Package Power Rating
Product Description
High speed microprocessor systems require well controlled, precise, fast edge-rate clock signals. Clock lines behave as
transmission lines for fast-edge signals and therefore the lines may exhibit transients caused by reflections and switching
noise. The PACTF clock filter reduces reflections and slows down edges to help reduce EMI/RFI radiation.
California Micro Devices P/Active Tapped Filter is an integrated thin film resistor-capacitor network designed to filter clock
lines and suppress EMI/RFI noise in personal computers and peripherals, workstations, Local Area Network (LAN), Asynchro-
nous Transfer Mode (ATM), and Wide Area Network (WAN). The filter includes ESD protection circuitry which prevents
device destruction when subjected to ESD discharges less than 2KV. The ESD protection circuitry permits the filter to
operate on bipolar signals of up to ±6V. California Micro Devices PAC TF is housed in a surface mount package suitable
for bottom side mounting to the board. This integrated network solution minimizes space and routing problems and
improves reliability and yields.
STANDARD SPECIFICATIONS
SCHEMATIC CONFIGURATION
23 22
21 20
19 18 17 16 15
14 13
±10%
±20%
0°C to 70°C
100mW
1 µA @ 25ºC max.
< 5% (typical)
24
> 6
Volts
< -
6
Volts
2KV min.
-60°C to 150°C
1.00W, max.
1
2
3
4
5
6
7
8
9
10 11
12
* ESD Protection level guaranteed by design.
© 2000 California Micro Devices Corp. All rights reserved.
4/00
C0380798
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
1
CALIFORNIA MICRO DEVICES
STANDARD VALUES
C(
pf
)
RC Code
fc @ 3db ‡
10
15
10
15
220/100T
220/150T
330/100T
330/150T
723
48 2
48 2
322
MHz
MHz
MHz
MHz
PACTFSERIES
R(
Ω)
22
22
33
33
with 0 source impedance
©2000 California Micro Devices Corp. All rights reserved.
2
O
bs
Pr o
od le
te
uc
t
220/100T
220/150T
330/100T
330/150T
24
24
24
24
QSOP
QSOP
QSOP
QSOP
PAC220/100TFQ/T
PAC220/150TFQ/T
PAC330/100TFQ/T
PAC330/150TFQ/T
PAC220/100TFQ/R
PAC220/150TFQ/R
PAC330/100TFQ/R
PAC330/150TFQ/R
RC Code
STANDARD PART ORDE RING INFORMATION
Package
Ordering Part Number
Pins
Style*
Tubes
Tape & Reel
Part Marking
PAC220/100TFQ
PAC220/150TFQ
PAC330/100TFQ
PAC330/150TFQ
Filter Cross Talk Test Circuit (T
A
=25
o
C)
50 Ohm
Pulse Generator
5 volt, 10 MHz,
> 1 nS Rise /
Fall Time
V
V = Victim Voltage
50
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
4/00
CALIFORNIA MICRO DEVICES
PACTFSERIES
Filter Insertion Loss (S12, dB), Typical (T
A
= 25°C)
Representative Sample
ATTENUATION CURVES
22
Ω
Filter
0
-2
-4
33
Ω
Filter
-5
C = 15pF
C = 10pF
-8
-10
-12
C = 15pF
C = 10pF
-10
O
bs
Pr o
od le
te
uc
t
-15
-14
10 MHz
100 MHz
1 GHz
10 MHz
100 MHz
1 GHz
S parameters are measured using a Hewlett Packard HP8753C Network Analyzer with a HP85047A S-parameter Test Set.
Application Information
The PACTF-2 is designed to minimize the EMI/RFI noise from the clock signals on PC motherboards. In order to get the best
results, the PACTF should be located as close as possible to the clock generator chips, such as Cypress CY2030 (used for
peripherals) and CY2275 (used for CPU, AGP, PCI, and SDRAM).
13
14
15
16
12
11
10
9
8
17
18
7
19
6
20
21
5
4
22
23
24
3
2
1
© 2000 California Micro Devices Corp. All rights reserved.
4/00
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
3