• Load Switch, PA Switch and Battery Switch for Portable
Devices
• High Frequency dc-to-dc Converters
• Low On-Resistance Switching
D
D
2
5
ABSOLUTE MAXIMUM RATINGS
T
A
= 25 °C, unless otherwise noted
Parameter
Drain-Source Voltage
Gate-Source Voltage
T
F
= 25 °C
Continuous Drain Current (T
J
= 150 °C)
T
F
= 70 °C
T
A
= 25 °C
T
A
= 70 °C
Pulsed Drain Current
Continuous Source-Drain Diode Current
T
F
= 25 °C
T
A
= 25 °C
T
F
= 25 °C
Maximum Power Dissipation
T
F
= 70 °C
T
A
= 25 °C
T
A
= 70 °C
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
T
J
, T
stg
P
D
I
DM
I
S
I
D
Symbol
V
DS
V
GS
Limit
12
±8
4
a
4
a
4
b, c
4
b, c
20
2.3
a
1.3
b, c
2.8
1.8
1.56
b, c
1.0
b, c
- 55 to 150
260
°C
W
A
Unit
V
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient
b, d
t
≤
5s
Steady State
Maximum Junction-to-Foot (Drain)
Notes:
a. T
F
= 25 °C, package limited.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 5 s.
d. Maximum under steady state conditions is 125 °C/W.
Document Number: 66701
S10-1287-Rev. A, 31-May-10
Symbol
R
thJA
R
thJF
Typical
60
34
Maximum
80
45
Unit
°C/W
www.vishay.com
1
New Product
Si1422DH
Vishay Siliconix
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
Parameter
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
V
GS(th)
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
Drain-Source On-State Resistance
a
Forward Transconductance
a
Dynamic
b
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
I
S
I
SM
V
SD
t
rr
Q
rr
t
a
t
b
I
F
= 7.2 A, dI/dt = 100 A/µs, T
J
= 25 °C
I
S
= 7.2 A, V
GS
= 0 V
0.8
15
4
8
7
T
C
= 25 °C
4
20
1.2
30
8
A
V
ns
nC
ns
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
V
DD
= 6 V, R
L
= 0.83
Ω
I
D
≅
7.2 A, V
GEN
= 8 V, R
g
= 1
Ω
V
DD
= 6 V, R
L
= 0.83
Ω
I
D
≅
7.2 A, V
GEN
= 4.5 V, R
g
= 1
Ω
f = 1 MHz
0.5
V
DS
= 6 V, V
GS
= 8 V, I
D
= 9 A
V
DS
= 6 V, V
GS
= 4.5 V, I
D
= 9 A
V
DS
= 6 V, V
GS
= 0 V, f = 1 MHz
725
195
90
13.1
7.5
1.1
0.8
2.5
10
10
20
10
5
10
20
10
5
15
15
30
15
10
15
30
15
ns
Ω
20
12
nC
pF
V
DS
ΔV
DS
/T
J
ΔV
GS(th)
/T
J
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(on)
g
fs
V
GS
= 0 V, I
D
= 250 µA
I
D
= 250 µA
V
DS
= V
GS
, I
D
= 250 µA
V
DS
= 0 V, V
GS
= ± 8 V
V
DS
= 12 V, V
GS
= 0 V
V
DS
= 12 V, V
GS
= 0 V, T
J
= 55 °C
V
DS
≥
5 V, V
GS
= 4.5 V
V
GS
= 4.5 V, I
D
= 5.1 A
V
GS
= 2.5 V, I
D
= 4.7 A
V
GS
= 1.8 V, I
D
= 2.5 A
V
DS
= 10 V, I
D
= 5.1 A
15
0.021
0.024
0.029
30
0.026
0.030
0.036
S
Ω
0.4
12
11
- 2.7
1.0
± 100
1
10
V
mV/°C
V
nA
µA
A
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Notes:
a. Pulse test; pulse width
≤
300 µs, duty cycle
≤
2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
2
Document Number: 66701
S10-1287-Rev. A, 31-May-10
New Product
Si1422DH
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
20
V
GS
= 5 V thru 2 V
16
I
D
- Drain Current (A)
I
D
- Drain Current (A)
8
10
12
V
GS
= 1.5 V
6
T
C
= 25 °C
4
T
C
= 125 °C
8
4
V
GS
= 1 V
0
0.0
2
0.5
1.0
1.5
2.0
2.5
3.0
0
0.0
T
C
= - 55 °C
0.3
0.6
0.9
1.2
1.5
V
DS
- Drain-to-Source Voltage (V)
V
GS
- Gate-to-Source Voltage (V)
Output Characteristics
0.06
1000
Transfer Characteristics
C
iss
0.05
R
DS(on)
- On-Resistance (Ω)
C - Capacitance (pF)
800
0.04
V
GS
= 1.8 V
0.03
V
GS
= 2.5 V
600
400
0.02
V
GS
= 4.5 V
C
oss
200
0.01
C
rss
0
0
4
8
12
16
20
0
0
2
4
6
8
10
12
I
D
- Drain Current (A)
V
DS
- Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current
8
I
D
= 9 A
V
GS
- Gate-to-Source Voltage (V)
6
V
DS
= 3 V
4
V
DS
= 6 V
1.5
Capacitance
V
GS
= 2.5 V, 1.8 V
1.4
I
D
= 5.1 A
R
DS(on)
- On-Resistance
(Normalized)
1.3
1.2
V
GS
= 4.5 V
1.1
1.0
0.9
0.8
V
DS
= 9.6 V
2
0
0
3
6
9
12
15
0.7
- 50
- 25
0
25
50
75
100
125
150
Q
g
- Total Gate Charge (nC)
T
J
- Junction Temperature (°C)
Gate Charge
Document Number: 66701
S10-1287-Rev. A, 31-May-10
On-Resistance vs. Junction Temperature
www.vishay.com
3
New Product
Si1422DH
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
100
0.06
I
D
= 5.1 A
0.05
R
DS(on)
- On-Resistance (Ω)
I
S
- Source Current (A)
T
J
= 125 °C
0.04
10
0.03
T
J
= 25 °C
1
T
J
= 150 °C
T
J
= 25 °C
0.02
0.01
0.1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
0
0
1
2
3
4
5
V
GS
- Gate-to-Source Voltage (V)
V
SD
- Source-to-Drain Voltage (V)
Soure-Drain Diode Forward Voltage
0.8
30
On-Resistance vs. Gate-to-Source Voltage
0.7
I
D
= 250 μA
25
0.6
V
GS(th)
(V)
20
Power (W)
0.5
15
0.4
10
0.3
5
0.2
- 50
- 25
0
25
50
75
100
125
150
0
0.001
0.01
0.1
1
Time (s)
10
100
1000
T
J
- Temperature(°C)
Threshold Voltage
100
Limited by R
DS(on)
*
100 μs
Single Pulse Power, Junction-to-Ambient
10
I
D
- Drain Current (A)
1 ms
1
10 ms
100 ms
1 s, 10 s
DC
BVDSS Limited
0.01
0.1
0.1
T
A
= 25 °C
Single Pulse
1
10
100
V
DS
- Drain-to-Source Voltage (V)
* V
GS
> minimum V
GS
at which R
DS(on)
is specified
Safe Operating Area, Junction-to-Ambient
www.vishay.com
4
Document Number: 66701
S10-1287-Rev. A, 31-May-10
New Product
Si1422DH
Vishay Siliconix
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
10
3.0
8
I
D
- Drain Current (A)
Power Dissipation (W)
2.5
2.0
6
Package Limited
4
1.5
1.0
2
0.5
0
0
25
50
75
100
125
150
0.0
25
50
75
100
125
150
T
C
- Case Temperature (°C)
T
F
- Foot Temperature (°C)
Current Derating*
Power Derating
* The power dissipation P
D
is based on T
J(max)
= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
Logic analyzers are widely used tools in digital design verification and debugging. They can verify the proper functioning of digital circuits and help users identify and troubleshoot faults. They ...[详细]
FPGA/CPLD
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