HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
Rev. 9 — 11 September 2014
Product data sheet
1. General description
The HEF4052B is a dual 4-channel analog multiplexer/demultiplexer with common
channel select logic. Each multiplexer/demultiplexer has four independent inputs/outputs
(nY0 to nY3) and a common input/output (nZ). The common channel select logic includes
two select inputs (S1 and S2) and an active LOW enable input (E). Both
multiplexers/demultiplexers contain four bidirectional analog switches, each with one side
connected to an independent input/output (nY0 to nY3) and the other side connected to a
common input/output (nZ). With E LOW, one of the four switches is selected
(low-impedance ON-state) by S1 and S2. With E HIGH, all switches are in the
high-impedance OFF-state, independent of S1 and S2. If break before make is needed,
then it is necessary to use the enable input.
V
DD
and V
SS
are the supply voltage connections for the digital control inputs (S1 and S2,
and E). The V
DD
to V
SS
range is 3 V to 15 V. The analog inputs/outputs (nY0 to nY3, and
nZ) can swing between V
DD
as a positive limit and V
EE
as a negative limit. V
DD
V
EE
may
not exceed 15 V. Unused inputs must be connected to V
DD
, V
SS
, or another input. For
operation as a digital multiplexer/demultiplexer, V
EE
is connected to V
SS
(typically
ground). V
EE
and V
SS
are the supply voltage connections for the switches.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from
40 C
to +85
C
and
40 C
to +125
C
Complies with JEDEC standard JESD 13-B
3. Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
NXP Semiconductors
HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
4. Ordering information
Table 1.
Ordering information
All types operate from
40
C to +125
C.
Type number
HEF4052BP
HEF4052BT
HEF4052BTT
Package
Name
DIP16
SO16
TSSOP16
Description
plastic dual in-line package; 16 leads (300 mil)
plastic small outline package; 16 leads; body width 3.9 mm
plastic thin shrink small outline package; 16 leads; body width 4.4 mm
Version
SOT38-4
SOT109-1
SOT403-1
5. Functional diagram
VDD
16
13
12
1Z
1Y0
14
1Y1
15
S1
10
11
LOGIC
LEVEL
CONVERSION
1 - OF - 4
DECODER
1Y2
1Y3
S2
9
1
2Y0
5
6
2
2Y1
E
2Y2
4
3
8
V
SS
7
mnb042
2Y3
2Z
V
EE
Fig 1.
Functional diagram
HEF4052B
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 9 — 11 September 2014
2 of 22
NXP Semiconductors
HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
nYn
V
DD
V
DD
nZ
V
EE
001aak604
Fig 2.
Schematic diagram (one switch)
10
9
13
6
1Z
1Y0
10
9
S1
S2
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
6
E
2Z
3
001aak605
0
1
G4
4
×
0
3
12
14
15
11
1
5
2
4
13
15
11
mnb041
MDX
3
0
1
2
3
1
5
2
4
12
14
2Y3
Fig 3.
Logic symbol
Fig 4.
IEC logic symbol
HEF4052B
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 9 — 11 September 2014
3 of 22
NXP Semiconductors
HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
1Z
1Y0
S1
LEVEL
CONVERTER
1Y1
S2
LEVEL
CONVERTER
1Y2
E
LEVEL
CONVERTER
1Y3
2Y0
2Y1
2Y2
2Y3
2Z
001aak634
Fig 5.
Logic diagram
HEF4052B
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 9 — 11 September 2014
4 of 22
NXP Semiconductors
HEF4052B
Dual 4-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
HEF4052B
2Y0
2Y2
2Z
2Y3
2Y1
E
V
EE
V
SS
1
2
3
4
5
6
7
8
001aag215
16 V
DD
HEF4052B
15 1Y2
14 1Y1
13 1Z
12 1Y0
11 1Y3
10 S1
9
S2
2Y0
2Y2
2Z
2Y3
2Y1
E
V
EE
V
SS
1
2
3
4
5
6
7
8
001aak606
16 V
DD
15 1Y2
14 1Y1
13 1Z
12 1Y0
11 1Y3
10 S1
9
S2
Fig 6.
Pin configuration SOT38-4 and SOT109-1
Fig 7.
Pin configuration SOT338-1 and SOT403-1
6.2 Pin description
Table 2.
Symbol
E
V
EE
V
SS
S1, S2
1Z, 2Z
V
DD
Pin description
Pin
6
7
8
10, 9
13, 3
16
Description
enable input (active LOW)
supply voltage
ground supply voltage
select input
independent input or output
common output or input
supply voltage
1Y0, 1Y1, 1Y2, 1Y3, 2Y0, 2Y1, 2Y2, 2Y3 12, 14, 15, 11, 1, 5, 2, 4
HEF4052B
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 9 — 11 September 2014
5 of 22
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