电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

KM44C4104CK-5

产品描述EDO DRAM, 4MX4, 50ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOJ-26/24
产品类别存储    存储   
文件大小385KB,共21页
制造商SAMSUNG(三星)
官网地址http://www.samsung.com/Products/Semiconductor/
下载文档 详细参数 全文预览

KM44C4104CK-5概述

EDO DRAM, 4MX4, 50ns, CMOS, PDSO24, 0.300 INCH, PLASTIC, SOJ-26/24

KM44C4104CK-5规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称SAMSUNG(三星)
零件包装代码SOJ
包装说明SOJ, SOJ24/26,.34
针数24
Reach Compliance Codeunknown
ECCN代码EAR99
访问模式FAST PAGE WITH EDO
最长访问时间50 ns
其他特性RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O 类型COMMON
JESD-30 代码R-PDSO-J24
JESD-609代码e0
长度17.15 mm
内存密度16777216 bit
内存集成电路类型EDO DRAM
内存宽度4
功能数量1
端口数量1
端子数量24
字数4194304 words
字数代码4000000
工作模式ASYNCHRONOUS
最高工作温度70 °C
最低工作温度
组织4MX4
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码SOJ
封装等效代码SOJ24/26,.34
封装形状RECTANGULAR
封装形式SMALL OUTLINE
电源5 V
认证状态Not Qualified
刷新周期2048
座面最大高度3.76 mm
自我刷新NO
最大待机电流0.001 A
最大压摆率0.11 mA
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子面层Tin/Lead (Sn/Pb)
端子形式J BEND
端子节距1.27 mm
端子位置DUAL
宽度7.62 mm

文档预览

下载PDF文档
KM44C4004C, KM44C4104C
KM44V4004C, KM44V4104C
CMOS DRAM
4M x 4Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 4.194,304 x 4 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of
memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K
Ref.), access time (-5 or -6), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this
family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh
operation is available in L-version.
This 4Mx4 EDO DRAM family is fabricated using Samsung′s advanced CMOS process to realize high band-width, low power consump-
tion and high reliability. It may be used as main memory unit for high level computer, microcomputer and personal computer.
FEATURES
Part Identification
- KM44C4004C/C-L (5V, 4K Ref.)
- KM44C4104C/C-L (5V, 2K Ref.)
- KM44V4004C/C-L (3.3V, 4K Ref.)
- KM44V4104C/C-L (3.3V, 2K Ref.)
Active Power Dissipation
Unit : mW
Speed
4K
-5
-6
324
288
3.3V
2K
396
360
4K
495
440
5V
2K
605
550
• Extended Data Out Mode operation
(Fast Page Mode with Extended Data Out)
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic SOJ and TSOP(II) packages
• Single +5V±10% power supply (5V product)
• Single +3.3V±0.3V power supply (3.3V product)
FUNCTIONAL BLOCK DIAGRAM
Refresh Cycles
Part
NO.
C4004C
V4004C
C4104C
V4104C
V
CC
5V
3.3V
5V
3.3V
2K
32ms
Refresh Control
Refresh Counter
Memory Array
4,194,304 x4
Cells
Refresh
cycle
4K
Refresh period
Normal
64ms
128ms
L-ver
RAS
CAS
W
Control
Clocks
VBB Generator
Vcc
Vss
Data in
Refresh Timer
Row Decoder
Sense Amps & I/O
Buffer
DQ0
to
DQ3
Performance Range
Speed
-5
-6
t
RAC
50ns
60ns
t
CAC
15ns
17ns
t
RC
84ns
104ns
t
HPC
20ns
25ns
Remark
5V/3.3V
5V/3.3V
A0-A11
(A0 - A10)
*1
A0 - A9
(A0 - A10)
*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Data out
Buffer
OE
Note)
*1
: 2K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1770  151  1419  2875  566  30  55  3  49  4 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved