电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

TB62202AFG

产品描述Micro Peripheral IC
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小1MB,共84页
制造商Marktech
官网地址https://www.marktechopto.com/
下载文档 详细参数 全文预览

TB62202AFG概述

Micro Peripheral IC

TB62202AFG规格参数

参数名称属性值
厂商名称Marktech
包装说明,
Reach Compliance Codeunknown

TB62202AFG文档预览

TB62202AFG
TOSHIBA Bi−CMOS Processor IC Silicon Monolithic
TB62202AFG
Dual-Stepping Motor Driver IC for OA Equipment Using PWM Chopper Type
The TB62202AFG is a dual-stepping motor driver driven by
chopper micro-step pseudo sine wave.
To drive two-phase stepping motors, Two pairs of 16-bit latch and
shift registers are built in the IC. The IC is optimal for driving
stepping motors at high efficiency and with low-torque ripple.
The IC supports Mixed Decay mode for switching the attenuation
ratio at chopping. The switching time for the attenuation ratio
can be switched in four stages according to the load.
Features
Two stepping motors driven by micro−step pseudo sine wave
are controlled by a single driver IC
Monolithic Bi-CMOS IC
Low ON-resistance of Ron = 1.2
(T
j
= 25°C @1.0 A: Typ.)
Two pairs of built-in 16-bit shift and latch registers
Two pairs of built-in 4-bit DA converters for micro steps
Built-in ISD, TSD, V
DD
and V
M
power monitor (reset) circuit for protection
Built-in charge pump circuit (two external capacitors)
36-pin power flat package (HSOP36-P-450-0.65)
Output voltage: 40 V max
Output current: 1.0 A/phase max
Built-in Mixed Decay mode enables specification of four-stage attenuation ratio.
(The attenuation ratio table can be overwritten externally.)
Chopping frequency can be set by external resistors and capacitors. High-speed chopping possible at 100 kHz or
higher.
Note:
When using the IC, pay attention to thermal conditions.
These devices are easy damage by high static voltage.
In regards to this, please handle with care.
Weight: 0.79 g (typ.)
1
2005-04-04
TB62202AFG
Block Diagram
1. Overview (Power lines: A/B unit (C/D unit is the same as A/B unit))
RESET
Logic circuit
Current control data logic circuit
DATA
CLK
STROBE
Current setting
V
ref
4-bit DA
(analog control)
Waveform
chapping
circuit
16-bit shift register
16-bit latch
Chopping
reference circuit
Chopping
waveform
generator
circuit
CR
Torque control
Current feedback circuit
R
S
V
RS
circuit
R
S COMP
circuit
Output control circuit
V
M
Ccp 2
Charge pump
circuit
Ccp 1
Output circuit
(H-bridge)
ISD
circuit
TSD
circuit
V
M
V
DDR
/V
MR
circuit
V
DD
Protected circuit
Out X
Stepping
motor
High voltage wiring (V
M
)
Logic DATA
Analog DATA
IC terminal
2
2005-04-04
TB62202AFG
2. Logic unit A/B (C/D unit is the same as A/B unit)
Function
This circuit is used to input from the DATA pins micro−step current setting data and to transfer them to the
subsequent stage. By switching the SETUP pin, the data in the mixed decay timing table can be overwritten.
SETUP
Micro-step current setting data logic circuit
16-bit shift register
MIXED
DECAY
TIMING
Output control
circuit
DATA
CLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
STROBE
16-bit latch
Data input
selector
A unit side
TORQUE
×
2 bits
DECAY
×
2 bits
B unit side
CURRENT
×
4 bits
B unit side
PHASE
×
1 bit
B
RESET
Current feedback circuit
D/A circuit
Output control circuit
Note: The
RESET
and SETUP pins are pulled down in the IC by 10-kΩ resistor.
When not using these pins, connect them to GND. Otherwise, malfunction may occur.
3
2005-04-04
TB62202AFG
3. Current feedback circuit and current setting circuit
(A/B unit (C/D unit is the same as A/B unit)
Function
The current setting circuit is used to set the reference voltage of the output current using the micro−step
current setting data input from the DATA pins.
The current feedback circuit is used to output to the output control circuit the relation between the set
current value and output current. This is done by comparing the reference voltage output to the current
setting circuit with the potential difference generated when current flows through the current sense resistor
connected between RS and V
M
.
The chopping waveform generator circuit to which CR is connected is used to generate clock used as
reference for the chopping frequency.
TORQUE
0, 1
LOGIC
UNIT
CURRENT
0~3
100%
85%
70%
50%
Torque
Control
circuit
Current setting circuit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Micro-step current setting
selector circuit
V
ref
Chopping waveform
generator circuit
CR
Waveform shaping circuit
4-bit
D/A
circuit
Chopping reference circuit
Mixed decay
timing circuit
Output stop signal (ALL OFF)
Use in Charge mode
V
RS
circuit 1
(detects
potential
difference
between
R
S
and V
M
)
V
RS
circuit 2
(detects
potential
difference
between
V
M
and R
S
)
R
S
COMP
circuit 1
(Note 1)
Output
control circuit
R
S
NF
(set current reached signal)
V
M
R
S
COMP
circuit 2
(Note 2)
RNF
(set current monitor signal)
Use in Fast mode
Current feedback circuit
Note 1: RS COMP 1: Compares the set current with the output current and outputs a signal when the output current
reaches the set current.
Note 2: RS COMP 2: Compares the set current with the output current at the end of Fast mode during chopping.
Outputs a signal when the set current is below the output current.
4
2005-04-04
TB62202AFG
4. Output control circuit, current feedback circuit and current setting circuit
(A/B unit
(C/D unit is the same as A/B unit)
Micro-step current setting
data logic circuit
DECAY
MODE
Chopping
reference circuit
MIXED
DECAY
TIMING
circuit
CR
COUNTER
MIXED
DECAY
TIMING
Charge start
Current
setting
circuit
Output stop
signal
Output control circuit
U
1
U
2
L
1
L
2
Output circuit
Output control circuit
NF
set current
reached signal
RNF
set current
monitor signal
PHASE
Current
feedback
circuit
CR COUNTER
Output RESET signal
V
DD
V
M
Power supply
for upper
output MOS
transistors
RESET
Output pin
ISD (current
shutdown)
circuit
V
MR
circuit
Reset signal
selector
circuit
Charge
pump
halt
signal
Charge pump
circuit
V
H
Output
circuit
V
M
Ccp A
V
DD
V
DDR
circuit
Thermal
shut down
(TSD)
circuit
Protection circuit
MICRO-STEP
CURRENT SETUP
LATCH CLEAR signal
Charge pump
circuit
MIXED DECAY
TIMING TABLE
CLEAR signal
LOGIC
Ccp B
Ccp C
V
DDR
: V
DD
power on Reset
V
MR
: V
M
power on Reset
ISD:
Current shutdown circuit
TSD: Thermal shutdown circuit
Note:
The
RESET
pins is pulled down in the IC by 10-kΩ resistor.
When not using the pin, connect it to GND. Otherwise, malfunction may occur.
5
2005-04-04

推荐资源

51的外部bank的使用注意事项
近来在使用京微雅各的CME_M5,是一个FPGA+51的片子,在使用51时,内部的资源不够用,所以使用了Code bank 目前使用了8个bank,但是程序在运行时,有时会出现死机,随机更改了一些.c文件所在的ba ......
hhakex 51单片机
请问有没有802.11a的无线通信模块啊?
最近想用802.11a的模块做个东西,但是不知道什么型号的模块能在S3C6440或者其他的ARM平台下使用,在淘宝下搜索了一下,几乎全是minipci的,但是板子上没这种接口呢,请大侠来解救啊:Sad:...
ghoulich 无线连接
Cadence中等长控制的属性问题
在进行等长控制走线需要的是同一个net的走线要控制,而现在我出现的问题是constraints管理器中直接生成了Pin to Pin的等长,而且把Pin to Pin删除之后,关了constraints管理器,再打开还是会出 ......
HJobe PCB设计
北京知名通信公司招聘Video Codec算法工程师
Video Codec算法工程师 15K-20K左右 岗位职责: 为不同平台设计、移植、优化和实现视频编解码算法。 任职资格: 1、硕士及以上学历,计算机、通信、电子等相关专业; 2、熟悉视频压 ......
安德Tyler 求职招聘
求助:MIC3390网卡驱动的奇怪问题,请专家们帮忙!!!
硬件:研华MIC3390 cpu板,网卡gei82573 我是用CF卡启动的(SATA好像BSP不支持,目前的状况是总有错,还没有时间管它。有兴趣做硬盘启动的xd可以一起来交流这个) 说说我遇到的奇怪现象: ......
lzj000008 嵌入式系统
两个UART接收中断同时发生,情况会怎样
第一种情况,如果两个UART接收中断同时发生,情况会怎样? 第二种情况,如果第一个UART接收中断正在接收数据,这时第二个UART中断发生,情况又会怎样? ...
zzbaizhi 微控制器 MCU

热门文章更多

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1566  2897  1020  2623  1881  32  59  21  53  38 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved