NCV887200
Automotive Grade
Non-Synchronous Boost
Controller
The NCV887200 is an adjustable output non−synchronous boost
controller which drives an external N−channel MOSFET. The device
uses peak current mode control with internal slope compensation. The
IC incorporates an internal regulator that supplies charge to the gate
driver.
Protection features include internally−set soft−start, undervoltage
lockout, cycle−by−cycle current limiting, hiccup−mode short−circuit
protection and thermal shutdown.
Additional features include low quiescent current sleep mode and
externally−synchronizable switching frequency.
Features
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MARKING
DIAGRAM
8
8
1
887200
A
L
Y
W
G
SOIC−8
D SUFFIX
CASE 751
1
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
887200
ALYW
G
•
•
•
•
•
•
•
•
•
•
•
•
•
Peak Current Mode Control with Internal Slope Compensation
1.2 V
±2%
Reference voltage
Fixed Frequency Operation
Wide Input Voltage Range of 4.8 V to 40 Vdc, 45 V Load Dump
Input Undervoltage Lockout (UVLO)
Extended UVLO Hysteresis Allows Continuous Operation with a
Reverse Polarity Protection Diode
Internal Soft−Start
Low Quiescent Current in Sleep Mode
Cycle−by−Cycle Current Limit Protection
Hiccup−Mode Overcurrent Protection (OCP)
Hiccup−Mode Short−Circuit Protection (SCP)
Thermal Shutdown (TSD)
This is a Pb−Free Device
PIN CONNECTIONS
EN/SYNC 1
ISNS 2
GND 3
GDRV 4
(Top View)
8 VFB
7 VC
6 VIN
5 VDRV
ORDERING INFORMATION
Device
NCV887200D1R2G
Package
SOIC−8
(Pb−Free)
Shipping
†
2500 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2015
1
June, 2015 − Rev. 7
Publication Order Number:
NCV887200/D
NCV887200
VIN
C
DRV
VDRV
GDRV
ISNS
GND
R
SNS
R
F1
Gm
SS
V
ref
8
VFB
R
F2
C
o
L
D
V
o
Q
C
g
V
g
TEMP
FAULT
LOGIC
EN/
SYNC
EN/SYNC
CLK
1
OSC
PWM
SC
DRIVE
LOGIC
CL
+
SCP
CSA
VDRV
6
5
4
2
3
VC
R
C
C
C
7
Figure 1. Simplified Block Diagram and Application Schematic
PACKAGE PIN DESCRIPTIONS
Pin No.
1
2
3
4
Pin
Symbol
EN/SYNC
ISNS
GND
GDRV
Function
Enable and synchronization input. The falling edge synchronizes the internal oscillator. The part is disabled
into sleep mode when this pin is brought low for longer than the enable time−out period.
Current sense input. Connect this pin to the source of the external N−MOSFET, through a current−sense
resistor to ground to sense the switching current for regulation and current limiting.
Ground reference.
Gate driver output. Connect to gate of the external N−MOSFET. A series resistance can be added from
GDRV to the gate to tailor EMC performance. An R
GND
= 15 kW (typical) GDRV−GND resistor is strongly
recommended.
Driving voltage. Internally−regulated supply for driving the external N−MOSFET, sourced from VIN. Bypass
with a 1.0
mF
ceramic capacitor to ground.
Input voltage. If bootstrapping operation is desired, connect a diode from the input supply to VIN, in addi-
tion to a diode from the output voltage to VDRV and/or VIN.
Output of the voltage error amplifier. An external compensator network from VC to GND is used to stabilize
the converter.
Output voltage feedback. A resistor from the output voltage to VFB with another resistor from VFB to GND
creates a voltage divider for regulation and programming of the output voltage.
5
6
7
8
VDRV
VIN
VC
VFB
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2
NCV887200
ABSOLUTE MAXIMUM RATINGS
(Voltages are with respect to GND, unless otherwise indicated)
Rating
Dc Supply Voltage (VIN)
Peak Transient Voltage (Load Dump on VIN)
Dc Supply Voltage (VDRV, GDRV)
Peak Transient Voltage (VFB)
Dc Voltage (VC, VFB, ISNS)
Dc Voltage (EN/SYNC)
Dc Voltage Stress (VIN − VDRV)*
Operating Junction Temperature
Storage Temperature Range
Peak Reflow Soldering Temperature: Pb−Free, 60 to 150 seconds at 217°C
Value
−0.3 to 40
45
12
−0.3 to 6
−0.3 to 3.6
−0.3 to 6
−0.7 to 45
−40 to 150
−65 to 150
265 peak
Unit
V
V
V
V
V
V
V
°C
°C
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*An external diode from the input to the VIN pin is required if bootstrapping VDRV and VIN off of the output voltage.
PACKAGE CAPABILITIES
Characteristic
ESD Capability (All Pins)
Moisture Sensitivity Level
Package Thermal Resistance
1. 1 in
2
, 1 oz copper area used for heatsinking.
Junction−to−Ambient, R
qJA
(Note 1)
Human Body Model
Machine Model
Value
w2.0
w200
1
100
Unit
kV
V
−
°C/W
Device Variations
The NCV8872 features several variants to better fit a
multitude of applications. The table below shows the typical
TYPICAL VALUES
Part No.
NCV887200
D
max
92%
f
s
675 kHz
t
ss
1.9 ms
S
a
34 mV/ms
values of parameters for the parts that are currently
available.
V
cl
200 mV
I
src
575 mA
I
sink
375 mA
V
DRV
8.4 V
SCE
Y
DEFINITIONS
Symbol
D
max
S
a
I
sink
Characteristic
Maximum Duty Cycle
Slope Compensating Ramp
Gate Drive Sinking Current
Symbol
f
s
V
cl
V
DRV
Characteristic
Switching Frequency
Current Limit Trip Voltage
Drive Voltage
Symbol
t
ss
I
src
SCE
Characteristic
Soft−Start Time
Gate Drive Sourcing Current
Short Circuit Enable
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3
NCV887200
ELECTRICAL CHARACTERISTICS
(−40°C < T
J
< 150°C, 4.8 V < V
IN
< 40 V, unless otherwise specified) Min/Max values are
guaranteed by test, design or statistical correlation.
Characteristic
GENERAL
Quiescent Current, Sleep Mode
Quiescent Current, Sleep Mode
Quiescent Current, No switching
Quiescent Current, Switching,
Normal Operation
OSCILLATOR
Minimum Pulse Width
Maximum Duty Cycle
Switching Frequency
Soft−Start Time
Soft−Start Delay
t
on,min
D
max
f
s
t
ss
t
ss,dly
From start of switching with V
FB
= 0 until ref-
erence voltage = V
REF
From EN
→
1 until start of switching with
V
FB
= 0 with V
C
pin compensation network
disconnected
90
91
608
1.55
−
115
92
675
1.90
200
140
93.5
742
2.25
280
ns
%
kHz
ms
ms
I
q,sleep
I
q,sleep
I
q,off
I
q,on
V
IN
= 13.2 V, EN = 0, T
J
= 25°C
V
IN
= 13.2 V, EN = 0, −40°C < T
J
< 125°C
Into VIN pin, EN = 1, No switching
Into VIN pin, EN = 1, Switching
−
−
−
−
2.0
2.0
1.5
3.0
−
6.0
2.5
6.0
mA
mA
mA
mA
Symbol
Conditions
Min
Typ
Max
Unit
Slope Compensating Ramp
ENABLE/SYNCHRONIZATION
EN/SYNC Pull−Down Current
EN/SYNC Input High Voltage
EN/SYNC Input Low Voltage
EN/SYNC Time−Out Ratio
S
a
30
34
38
mV/ms
I
EN/SYNC
V
s,ih
V
s,il
%t
en
V
EN/SYNC
= 5 V
−
2.0
0
5.0
−
−
−
10
5.0
800
350
mA
V
mV
%
From SYNC falling edge, to oscillator control
(EN high) or shutdown (EN low), Percent of
typical switching period
Percent of f
s
−
SYNC Minimum Frequency Ratio
SYNC Maximum Frequency
Synchronization Delay
Synchronization Duty Cycle
CURRENT SENSE AMPLIFIER
Low−Frequency Gain
Bandwidth
ISNS Input Bias Current
Current Limit Threshold Voltage
Current Limit, Response Time
Overcurrent Protection,
Threshold Voltage
Overcurrent Protection,
Response Time
%f
sync,min
f
sync,max
t
s,dly
D
sync
−
1.1
−
−
50
−
80
−
100
75
%
MHz
ns
%
From SYNC falling edge to GDRV falling
edge
−
25
A
csa
BW
csa
I
sns,bias
V
cl
t
cl
%V
ocp
t
ocp
Input−to−output gain at dc, ISNS
v
1 V
Gain of A
csa
− 3 dB
Out of ISNS pin
Voltage on ISNS pin
CL tripped until GDRV falling edge,
V
ISNS
= V
cl
(typ) + 60 mV
Percent of V
cl
From overcurrent event, Until switching
stops, V
ISNS
= V
OCP
+ 40 mV
0.9
2.5
−
180
−
125
−
1.0
−
30
200
80
150
−
1.1
−
50
220
125
175
125
V/V
MHz
mA
mV
ns
%
ns
VOLTAGE ERROR OPERATIONAL TRANSCONDUCTANCE AMPLIFIER
Transconductance
VEA Output Resistance
VFB Input Bias Current
Reference Voltage
VEA Maximum Output Voltage
g
m,vea
R
o,vea
I
vfb,bias
V
ref
V
c,max
Current out of VFB pin
V
FB
– V
ref
=
±
20 mV
0.9
2.0
−
1.176
2.5
1.25
−
0.5
1.200
−
1.6
−
2.0
1.224
−
mS
MW
mA
V
V
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NCV887200
ELECTRICAL CHARACTERISTICS
(−40°C < T
J
< 150°C, 4.8 V < V
IN
< 40 V, unless otherwise specified) Min/Max values are
guaranteed by test, design or statistical correlation.
Characteristic
Symbol
Conditions
Min
Typ
Max
Unit
VOLTAGE ERROR OPERATIONAL TRANSCONDUCTANCE AMPLIFIER
VEA Minimum Output Voltage
VEA Sourcing Current
VEA Sinking Current
GATE DRIVER
Sourcing Current
Sinking Current
Driving Voltage Dropout
Driving Voltage Source Current
Backdrive Diode Voltage Drop
Driving Voltage
UVLO
Undervoltage Lock−Out,
Threshold Voltage
Undervoltage Lock−Out,
Hysteresis
SHORT CIRCUIT PROTECTION
Startup blanking period
Hiccup−mode period
Short circuit threshold voltage
Short circuit delay
THERMAL SHUTDOWN
Thermal shutdown threshold
Thermal shutdown hysteresis
Thermal shutdown delay
T
sd
T
sd,hys
t
sd,dly
T
J
rising
T
J
falling
From T
J
> T
sd
to stop switching
160
10
−
170
15
−
180
20
100
°C
°C
ns
%t
scp,dly
%t
hcp,dly
%V
scp
t
scp
From start of soft−start, Percent of t
ss
From shutdown to start of soft−start,
Percent of t
ss
V
FB
as percent of V
ref
From V
FB
< V
scp
to stop switching
100
70
60
−
120
85
67
35
150
100
75
100
%
%
%
ns
V
uvlo
V
uvlo,hys
V
IN
falling
V
IN
rising
V
IN
rising
4.6
−
350
4.75
5.23
500
4.90
5.45
−
V
mV
I
src
I
sink
V
drv,do
I
drv
V
d,bd
V
DRV
V
DRV
≥
6 V, V
DRV
− V
GDRV
= 2 V
V
GDRV
≥
2 V
V
IN
− V
DRV
, Iv
DRV
= 25 mA
V
IN
− V
DRV
= 1 V
V
DRV
− V
IN
, I
d,bd
= 5 mA
I
VDRV
= 0.1 − 25 mA
400
250
−
35
−
8.0
575
375
0.3
45
−
8.4
−
−
0.6
−
0.7
8.8
mA
mA
V
mA
V
V
V
c,min
I
src,vea
I
snk,vea
VEA output current, Vc = 2.0 V
VEA output current, Vc = 0.7 V
−
80
80
−
100
100
0.3
−
−
V
mA
mA
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